tree-wide: remove trailing backslash
[mesa.git] / src / intel / compiler / brw_vec4.cpp
2017-05-18 Samuel Iglesias... i965/vec4: load dvec3/4 uniforms first in the push...
2017-05-09 Jason Ekstrandi965/vec4: Use NIR to do GS input remapping
2017-05-09 Jason Ekstrandi965/vec4: Use NIR remapping for VS attributes
2017-05-09 Jason Ekstrandintel/compiler/vs: Move inputs_read handling to generic...
2017-05-09 Jason Ekstrandi965/vec4: Set VERT_BIT_EDGEFLAG based on the VUE map
2017-05-09 Jason Ekstrandi965/vs: Set uses_vertexid and friends from brw_compile_vs
2017-05-09 Jason Ekstrandnir: Embed the shader_info in the nir_shader again
2017-05-03 Samuel Iglesias... i965/vec4: fix register width for DF VGRF and UNIFORM
2017-05-03 Samuel Iglesias... i965/vec4: fix vertical stride to avoid breaking region...
2017-04-24 Kenneth Graunkei965/vec4: Use reads_accumulator_implicitly(), not...
2017-04-22 Kenneth Graunkei965/vec4: Avoid reswizzling MACH instructions in opt_r...
2017-04-14 Samuel Iglesias... i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcod...
2017-04-14 Juan A. Suarez Romeroi965/vec4: keep original type when dealing with null...
2017-04-14 Samuel Iglesias... i965/vec4: split DF instructions and later double its...
2017-03-13 Jason Ekstrandi965: Move the back-end compiler to src/intel/compiler