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mem: Do not include snoop-filter latency in crossbar occupancy
[gem5.git]
/
src
/
mem
/
cache
/
cache.hh
2015-08-21
Andreas Hansson
mem: Remove unused cache squash functionality
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2015-08-21
Andreas Hansson
mem: Add explicit Cache subclass and make BaseCache...
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2015-08-21
Andreas Hansson
mem: Move cache_impl.hh to cache.cc
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2015-07-07
Andreas Sandberg
sim: Refactor the serialization base class
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2015-07-03
Ali Jafri
mem: Add clean evicts to improve snoop filter tracking
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2015-05-05
David Guillen
mem: Remove templates in cache model
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2015-03-27
Andreas Hansson
mem: Allocate cache writebacks before new MSHRs
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2015-03-02
Andreas Hansson
mem: Split port retry for all different packet classes
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2015-02-03
Andreas Hansson
mem: Clarify cache behaviour for pending dirty responses
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2014-12-02
Andreas Hansson
mem: Add const getters for write packet data
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2014-10-09
Andreas Hansson
mem: Add packet sanity checks to cache and MSHRs
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2014-06-27
Curtis Dunham
mem: write streaming support via WriteInvalidate promotion
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2014-05-13
Curtis Dunham
cpu, mem: Make software prefetches non-blocking
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2014-01-29
Amin Farmahini
mem: Remove redundant findVictim() input argument
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2014-01-24
Giacomo Gabrielli
mem: Add support for a security bit in the memory system
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2013-07-18
Andreas Hansson
mem: Set the cache line size on a system level
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2013-07-18
Xiangyu Dong
mem: Add cache class destructor to avoid memory leaks
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2013-06-27
Prakash Ramrakhyani
mem: Reorganize cache tags and make them a SimObject
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2013-06-27
Andreas Hansson
mem: Cycles converted to Ticks in atomic cache accesses
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2013-02-19
Andreas Hansson
mem: Change accessor function names to match the port...
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2013-02-15
Andreas Hansson
mem: Tighten up cache constness and scoping
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2013-01-07
Andreas Sandberg
mem: Fix guest corruption when caches handle uncacheabl...
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2012-11-02
Andreas Sandberg
mem: Add support for writing back and flushing caches
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2012-10-15
Andreas Hansson
Mem: Use cycles to express cache-related latencies
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2012-09-25
Djordje Kovacevic
MEM: Put memory system document into doxygen
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2012-07-09
Andreas Hansson
Port: Make getAddrRanges const
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2012-06-07
Ali Saidi
mem: Delay deleting of incoming packets by one call.
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2012-05-24
Andreas Hansson
Cache: Remove dangling doWriteback declaration
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2012-05-10
Ali Saidi
Cache: Panic if you attempt to create a checkpoint...
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2012-05-01
Andreas Hansson
MEM: Separate requests and responses for timing accesses
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2012-04-14
Andreas Hansson
MEM: Separate snoops and normal memory requests/responses
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2012-03-30
William Wang
MEM: Introduce the master/slave port sub-classes in C++
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2012-03-22
Andreas Hansson
MEM: Split SimpleTimingPort into PacketQueue and ports
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2012-02-24
Andreas Hansson
MEM: Simplify cache ports preparing for master/slave...
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2012-02-12
Mrinmoy Ghosh
prefetcher: Make prefetcher a sim object instead of...
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2012-01-28
Gabe Black
Merge with the main repo.
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2012-01-17
Andreas Hansson
MEM: Separate queries for snooping and address ranges
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2012-01-17
Andreas Hansson
MEM: Remove Port removeConn and MemObject deletePortRefs
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2012-01-17
Andreas Hansson
MEM: Differentiate functional cache accesses from CPU...
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2011-04-15
Nathan Binkert
includes: sort all includes
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2010-09-09
Steve Reinhardt
cache: coherence protocol enhancements & bug fixes
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2008-07-16
Steve Reinhardt
mem: use single BadAddr responder per system.
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2009-04-06
Gabe Black
Merge ARM into the head. ARM will compile but may not...
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2009-02-16
Steve Reinhardt
Fixes to get prefetching working again.
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2008-10-23
Lisa Hsu
s/cpu_id/cpuId in o3 (to be consistent and match style...
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2008-10-23
Lisa Hsu
probe function no longer used anywhere.
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2008-10-20
Lisa Hsu
Automated merge with ssh://daystrom.m5sim.org//z/repo/m5
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2008-10-16
Lisa Hsu
Automated merge with ssh://daystrom.m5sim.org//z/repo/m5
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2008-10-14
Lisa Hsu
This function declaration isn't used anywhere.
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2008-06-28
Steve Reinhardt
Automated merge after backout.
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2008-06-28
Steve Reinhardt
Backed out changeset 94a7bb476fca: caused memory leak.
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2008-06-24
Ali Saidi
Automated merge with repo.m5sim.org/m5-stable
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2008-06-21
Steve Reinhardt
Generate more useful error messages for unconnected...
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2008-03-25
Steve Reinhardt
Automated merge with ssh://daystrom.m5sim.org//repo/m5
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2008-03-25
Steve Reinhardt
Fix handling of writeback-induced writebacks in atomic...
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2008-02-27
Steve Reinhardt
Automated merge with ssh://daystrom.m5sim.org//repo/m5
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2008-02-27
Steve Reinhardt
Cache: better comments particularly regarding writeback...
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2008-02-16
Steve Reinhardt
Make L2+ caches allocate new block for writeback misses
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2008-02-11
Steve Reinhardt
Automated merge with file:/home/stever/hg/m5-orig
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2008-02-10
Steve Reinhardt
Fix #include lines for renamed cache files.
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2008-01-02
Steve Reinhardt
Add ReadRespWithInvalidate to handle multi-level cohere...
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2008-01-02
Steve Reinhardt
Add functional PrintReq command for memory-system debug...
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2007-08-30
Miles Kaufmann
params: Deprecate old-style constructors; update most...
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2007-08-14
Ali Saidi
Merge IGNORE_STYLE change and my change.
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2007-08-12
Nathan Binkert
merge
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2007-08-10
Ali Saidi
DMA: Add IOCache and fix bus bridge to optionally only...
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2007-08-05
Gabe Black
Merge with head.
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2007-08-03
Steve Reinhardt
merge from head
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2007-08-01
Nathan Binkert
merge: mips fix to getArgument
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2007-08-01
Gabe Black
Merge with head.
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2007-08-01
Gabe Black
Merge with head.
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2007-07-31
Steve Reinhardt
Merge from head.
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2007-07-29
Steve Reinhardt
Merge Gabe's changes from head.
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2007-07-29
Nathan Binkert
merge: style.py fix
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2007-07-29
Nathan Binkert
merge whitespace fixes
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2007-07-29
Nathan Binkert
merge whitespace changes
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2007-07-27
Nathan Binkert
Merge python and x86 changes with cache branch
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2007-07-23
Steve Reinhardt
Replace lowerMSHRPending flag with more robust scheme
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2007-07-22
Steve Reinhardt
Merge from head.
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2007-07-22
Steve Reinhardt
Merge more changes in from head.
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2007-07-22
Steve Reinhardt
Replace DeferredSnoop flag with LowerMSHRPending flag.
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2007-07-16
Steve Reinhardt
Merge from head.
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2007-07-14
Steve Reinhardt
Merge from head.
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2007-07-14
Steve Reinhardt
Merge of DPRINTF fixes from head.
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2007-07-14
Steve Reinhardt
Merge in .hgignore from head.
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2007-07-14
Steve Reinhardt
Merge with head
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2007-06-29
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-28
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-28
Steve Reinhardt
Get rid of coherence protocol object.
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2007-06-27
Steve Reinhardt
Revamp replacement-of-upgrade handling.
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2007-06-27
Steve Reinhardt
Handle deferred snoops better.
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2007-06-25
Steve Reinhardt
Better handling of deferred targets.
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2007-06-23
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-22
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-22
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-22
Steve Reinhardt
Fixes to hitLatency, blocking, buffer allocation.
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2007-06-21
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-21
Steve Reinhardt
Getting closer...
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2007-06-18
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-18
Steve Reinhardt
More major reorg of cache. Seems to work for atomic...
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