git.libre-soc.org Git - gem5.git/history - src/mem/cache/cache

[gem5.git] / src / mem / cache / cache_impl.hh

2014-09-20	Andreas Hansson	mem: Rename Bus to XBar to better reflect its behaviour	blob \| commitdiff \| raw
2014-09-19	Andreas Hansson	mem: Add checks to sendTimingReq in cache	blob \| commitdiff \| raw \| diff to current
2014-06-27	Curtis Dunham	mem: write streaming support via WriteInvalidate promotion	blob \| commitdiff \| raw \| diff to current
2014-09-03	Andreas Hansson	mem: Fix a bug in the cache port flow control	blob \| commitdiff \| raw \| diff to current
2014-05-13	Curtis Dunham	cpu, mem: Make software prefetches non-blocking	blob \| commitdiff \| raw \| diff to current
2014-09-03	Geoffrey Blake	cache: Fix handling of LL/SC requests under contention	blob \| commitdiff \| raw \| diff to current
2014-08-13	Mitch Hayenga	mem: Properly set cache block status fields on writebacks	blob \| commitdiff \| raw \| diff to current
2014-05-09	Mitch Hayenga	mem: Squash prefetch requests from downstream caches	blob \| commitdiff \| raw \| diff to current
2014-03-07	Prakash Ramrakhyani	mem: Fix incorrect assert failure in the Cache	blob \| commitdiff \| raw \| diff to current
2014-02-18	Andreas Hansson	mem: Filter cache snoops based on address ranges	blob \| commitdiff \| raw \| diff to current
2014-01-30	Mitch Hayenga ext...	mem: prefetcher: add options, support for unaligned...	blob \| commitdiff \| raw \| diff to current
2014-01-29	Amin Farmahini	mem: Remove redundant findVictim() input argument	blob \| commitdiff \| raw \| diff to current
2014-01-24	Giacomo Gabrielli	mem: Add support for a security bit in the memory system	blob \| commitdiff \| raw \| diff to current
2014-01-24	Dam Sunwoo	mem: per-thread cache occupancy and per-block ages	blob \| commitdiff \| raw \| diff to current
2013-10-17	Matt Horsnell	cpu: add consistent guarding to *_impl.hh files.	blob \| commitdiff \| raw \| diff to current
2013-07-18	Xiangyu Dong	mem: Add cache class destructor to avoid memory leaks	blob \| commitdiff \| raw \| diff to current
2013-06-27	Prakash Ramrakhyani	mem: Reorganize cache tags and make them a SimObject	blob \| commitdiff \| raw \| diff to current
2013-06-27	Andreas Hansson	mem: Align cache timing to clock edges	blob \| commitdiff \| raw \| diff to current
2013-06-27	Andreas Hansson	mem: Cycles converted to Ticks in atomic cache accesses	blob \| commitdiff \| raw \| diff to current
2013-06-27	Andreas Hansson	mem: Remove a redundant heap allocation for a snoop...	blob \| commitdiff \| raw \| diff to current
2013-04-22	Uri Wiener	mem: Adding verbose debug output in the memory system	blob \| commitdiff \| raw \| diff to current
2013-03-27	Mitch Hayenga	mem: Fix cache latency bug	blob \| commitdiff \| raw \| diff to current
2013-02-19	Andreas Hansson	mem: Fix sender state bug and delay popping	blob \| commitdiff \| raw \| diff to current
2013-02-19	Andreas Hansson	scons: Fix up numerous warnings about name shadowing	blob \| commitdiff \| raw \| diff to current
2013-02-19	Andreas Hansson	mem: Enforce strict use of busFirst- and busLastWordTime	blob \| commitdiff \| raw \| diff to current
2013-02-19	Andreas Hansson	mem: Change accessor function names to match the port...	blob \| commitdiff \| raw \| diff to current
2013-02-19	Andreas Hansson	mem: Make packet bus-related time accounting relative	blob \| commitdiff \| raw \| diff to current
2013-02-19	Andreas Hansson	sim: Make clock private and access using clockPeriod()	blob \| commitdiff \| raw \| diff to current
2013-02-19	Andreas Hansson	mem: Add predecessor to SenderState base class	blob \| commitdiff \| raw \| diff to current
2013-02-15	Andreas Hansson	mem: Tighten up cache constness and scoping	blob \| commitdiff \| raw \| diff to current
2013-02-15	Andreas Sandberg	sim: Add a system-global option to bypass caches	blob \| commitdiff \| raw \| diff to current
2013-01-07	Andreas Sandberg	mem: Fix guest corruption when caches handle uncacheabl...	blob \| commitdiff \| raw \| diff to current
2013-01-07	Ali Saidi	cache: add note about where conflicts are handled	blob \| commitdiff \| raw \| diff to current
2012-11-02	Andreas Sandberg	mem: Add support for writing back and flushing caches	blob \| commitdiff \| raw \| diff to current
2012-10-15	Andreas Hansson	Mem: Use cycles to express cache-related latencies	blob \| commitdiff \| raw \| diff to current
2012-09-25	Mrinmoy Ghosh	Cache: add a response latency to the caches	blob \| commitdiff \| raw \| diff to current
2012-09-19	Andreas Hansson	AddrRange: Transition from Range<T> to AddrRange	blob \| commitdiff \| raw \| diff to current
2012-09-11	Lena Olson	Cache: Split invalidateBlk up to seperate block vs...	blob \| commitdiff \| raw \| diff to current
2012-08-22	Andreas Hansson	Packet: Remove NACKs from packet and its use in endpoints	blob \| commitdiff \| raw \| diff to current
2012-08-22	Andreas Hansson	Port: Extend the QueuedPort interface and use where...	blob \| commitdiff \| raw \| diff to current
2012-07-27	Anthony Gutierrez	cache: don't allow dirty data in the i-cache	blob \| commitdiff \| raw \| diff to current
2012-07-09	Andreas Hansson	Port: Align port names in C++ and Python	blob \| commitdiff \| raw \| diff to current
2012-07-09	Andreas Hansson	Port: Make getAddrRanges const	blob \| commitdiff \| raw \| diff to current
2012-07-09	Andreas Hansson	Port: Add isSnooping to slave port (asking master port)	blob \| commitdiff \| raw \| diff to current
2012-06-29	Dam Sunwoo	Mem: fix master id assertion in cache_impl.hh	blob \| commitdiff \| raw \| diff to current
2012-06-29	Ali Saidi	Cache: Only invalidate a line in the cache when an...	blob \| commitdiff \| raw \| diff to current
2012-06-07	Ali Saidi	mem: Delay deleting of incoming packets by one call.	blob \| commitdiff \| raw \| diff to current
2012-06-05	Ali Saidi	sim: Remove FastAlloc	blob \| commitdiff \| raw \| diff to current
2012-05-30	Andreas Hansson	Bus: Turn the PortId into a transport function parameter	blob \| commitdiff \| raw \| diff to current
2012-05-30	Andreas Hansson	Packet: Unify the use of PortID in packet and port	blob \| commitdiff \| raw \| diff to current
2012-05-10	Ali Saidi	Cache: restructure code that actually isn't a loop	blob \| commitdiff \| raw \| diff to current
2012-05-10	Ali Saidi	Cache: Panic if you attempt to create a checkpoint...	blob \| commitdiff \| raw \| diff to current
2012-05-01	Andreas Hansson	MEM: Separate requests and responses for timing accesses	blob \| commitdiff \| raw \| diff to current
2012-04-14	Andreas Hansson	MEM: Remove the Broadcast destination from the packet	blob \| commitdiff \| raw \| diff to current
2012-04-14	Andreas Hansson	MEM: Separate snoops and normal memory requests/responses	blob \| commitdiff \| raw \| diff to current
2012-03-30	William Wang	MEM: Introduce the master/slave port sub-classes in C++	blob \| commitdiff \| raw \| diff to current
2012-03-22	Andreas Hansson	MEM: Split SimpleTimingPort into PacketQueue and ports	blob \| commitdiff \| raw \| diff to current
2012-03-09	Ali Saidi	cache: Allow main memory to be at disjoint address...	blob \| commitdiff \| raw \| diff to current
2012-03-01	Ali Saidi	Cache: Fix an issue with LRU when bonus block is used...	blob \| commitdiff \| raw \| diff to current
2012-02-24	Andreas Hansson	MEM: Simplify cache ports preparing for master/slave...	blob \| commitdiff \| raw \| diff to current
2012-02-12	Dam Sunwoo	mem: fix cache stats to use request ids correctly	blob \| commitdiff \| raw \| diff to current
2012-02-12	Ali Saidi	mem: Add a master ID to each request object.	blob \| commitdiff \| raw \| diff to current
2012-02-12	Mrinmoy Ghosh	prefetcher: Make prefetcher a sim object instead of...	blob \| commitdiff \| raw \| diff to current
2012-02-01	Gabe Black	Merge ... head, hopefully the last time for this batch.	blob \| commitdiff \| raw \| diff to current
2012-01-31	Andreas Hansson	MEM: Remove the otherPort from the cache ports	blob \| commitdiff \| raw \| diff to current
2012-01-28	Gabe Black	Merge with the main repo.	blob \| commitdiff \| raw \| diff to current
2012-01-17	William Wang	MEM: Remove the functional ports from the memory system	blob \| commitdiff \| raw \| diff to current
2012-01-17	Andreas Hansson	MEM: Separate queries for snooping and address ranges	blob \| commitdiff \| raw \| diff to current
2012-01-17	Andreas Hansson	MEM: Remove Port removeConn and MemObject deletePortRefs	blob \| commitdiff \| raw \| diff to current
2012-01-17	Andreas Hansson	MEM: Simplify ports by removing EventManager	blob \| commitdiff \| raw \| diff to current
2012-01-17	Andreas Hansson	MEM: Differentiate functional cache accesses from CPU...	blob \| commitdiff \| raw \| diff to current
2011-09-13	Ali Saidi	Prefetch: Don't prefetch if address is in the write...	blob \| commitdiff \| raw \| diff to current
2011-08-19	Ali Saidi	Mem: Put prefetcher notify call before packet is deleted.	blob \| commitdiff \| raw \| diff to current
2011-08-19	Ali Saidi	Prefetcher: Fix some memory leaks with the prefetcher.	blob \| commitdiff \| raw \| diff to current
2011-07-15	Ali Saidi	Mem: Fix issue with prefetches originating at non-L1...	blob \| commitdiff \| raw \| diff to current
2011-04-15	Nathan Binkert	trace: reimplement the DTRACE function so it doesn...	blob \| commitdiff \| raw \| diff to current
2011-04-15	Nathan Binkert	includes: sort all includes	blob \| commitdiff \| raw \| diff to current
2011-03-18	Ali Saidi	Automated merge with ssh://hg@repo.m5sim.org/m5	blob \| commitdiff \| raw \| diff to current
2011-03-18	Ali Saidi	Mem: Fix issue with dirty block being lost when entire...	blob \| commitdiff \| raw \| diff to current
2011-01-08	Steve Reinhardt	Replace curTick global variable with accessor functions.	blob \| commitdiff \| raw \| diff to current
2010-10-18	Steve Reinhardt	cache: minor SC assertion fix	blob \| commitdiff \| raw \| diff to current
2010-10-13	Gabe Black	Mem: Change the CLREX flag to CLEAR_LL.	blob \| commitdiff \| raw \| diff to current
2010-09-22	Steve Reinhardt	cache: improve coherence handling of writebacks	blob \| commitdiff \| raw \| diff to current
2010-09-09	Steve Reinhardt	cache: fail SC when invalidated while waiting for bus	blob \| commitdiff \| raw \| diff to current
2010-09-09	Steve Reinhardt	mem: fix functional accesses to deal with coherence...	blob \| commitdiff \| raw \| diff to current
2010-09-09	Steve Reinhardt	cache: coherence protocol enhancements & bug fixes	blob \| commitdiff \| raw \| diff to current
2010-08-26	Steve Reinhardt	mem: fix m5.fast compile bug in previous cset	blob \| commitdiff \| raw \| diff to current
2010-08-26	Steve Reinhardt	cache: fix a bug in atomic multilevel snoops	blob \| commitdiff \| raw \| diff to current
2010-08-23	Gene Wu	MEM: Make CLREX a first class request operation and...	blob \| commitdiff \| raw \| diff to current
2010-08-23	Gene Wu	ARM: Make sure that software prefetch instructions...	blob \| commitdiff \| raw \| diff to current
2010-07-22	Timothy M. Jones	Port: Only indicate that a SimpleTimingPort is drained...	blob \| commitdiff \| raw \| diff to current
2010-07-09	Steve Reinhardt	cache: fix bug in SC upgrade handling	blob \| commitdiff \| raw \| diff to current
2010-06-23	Steve Reinhardt	cache: fix longstanding prefetcher bug	blob \| commitdiff \| raw \| diff to current
2010-06-16	Steve Reinhardt	cache: fail store conditionals when upgrade loses race	blob \| commitdiff \| raw \| diff to current
2010-06-16	Steve Reinhardt	cache: fix dirty bit setting	blob \| commitdiff \| raw \| diff to current
2010-02-23	Lisa Hsu	cache: Make caches sharing aware and add occupancy...	blob \| commitdiff \| raw \| diff to current
2010-01-22	Derek Hower	Automated merge with ssh://hg@m5sim.org/m5	blob \| commitdiff \| raw \| diff to current
2010-01-19	Derek Hower	merge	blob \| commitdiff \| raw \| diff to current
2010-01-18	Lisa Hsu	Automated merge with ssh://hsul@localhost:4444//repo/m5	blob \| commitdiff \| raw \| diff to current
2010-01-12	Lisa Hsu	cache: make tags->insertBlock() and tags->accessBlock...	blob \| commitdiff \| raw \| diff to current
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