cache: coherence protocol enhancements & bug fixes
[gem5.git] / src / mem / cache / cache_impl.hh
2010-09-09 Steve Reinhardtcache: coherence protocol enhancements & bug fixes
2010-08-26 Steve Reinhardtmem: fix m5.fast compile bug in previous cset
2010-08-26 Steve Reinhardtcache: fix a bug in atomic multilevel snoops
2010-08-23 Gene WuMEM: Make CLREX a first class request operation and...
2010-08-23 Gene WuARM: Make sure that software prefetch instructions...
2010-07-22 Timothy M. JonesPort: Only indicate that a SimpleTimingPort is drained...
2010-07-09 Steve Reinhardtcache: fix bug in SC upgrade handling
2010-06-23 Steve Reinhardtcache: fix longstanding prefetcher bug
2010-06-16 Steve Reinhardtcache: fail store conditionals when upgrade loses race
2010-06-16 Steve Reinhardtcache: fix dirty bit setting
2010-02-23 Lisa Hsucache: Make caches sharing aware and add occupancy...
2010-01-22 Derek HowerAutomated merge with ssh://hg@m5sim.org/m5
2010-01-19 Derek Howermerge
2010-01-18 Lisa HsuAutomated merge with ssh://hsul@localhost:4444//repo/m5
2010-01-12 Lisa Hsucache: make tags->insertBlock() and tags->accessBlock...
2009-09-26 Steve ReinhardtMinor cleanup: Use the blockAlign() method where it...
2009-09-26 Steve ReinhardtForce prefetches to check cache and MSHRs immediately...
2009-08-03 Derek HowerAutomated merge with ssh://hg@m5sim.org/m5
2009-08-02 Steve ReinhardtFix setting of INST_FETCH flag for O3 CPU.
2009-05-17 Nathan Binkertincludes: sort includes again
2009-05-17 Nathan Binkerttypes: Move stuff for global types into src/base/types.hh
2008-07-16 Steve Reinhardtmem: use single BadAddr responder per system.
2009-04-20 Gabe BlackMem: Change isLlsc to isLLSC.
2009-04-19 Gabe BlackMemory: Rename LOCKED for load locked store conditional...
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not...
2009-03-12 Steve Reinhardtcache: set dirty bit on swaps (oops!)
2009-02-16 Steve ReinhardtFixes to get prefetching working again.
2008-11-10 Steve ReinhardtCache: Refactor packet forwarding a bit.
2008-11-04 Lisa Hsudecouple eviction from insertion in the cache.
2008-11-04 Lisa HsuChange the findBlock(addr, lat) to accessBlock, which...
2008-11-04 Lisa Hsuget rid of all instances of readTid() and getThreadNum...
2008-10-09 Nathan Binkerteventq: convert all usage of events to use the new...
2008-06-28 Steve ReinhardtAutomated merge after backout.
2008-06-28 Steve ReinhardtBacked out changeset 94a7bb476fca: caused memory leak.
2008-06-24 Ali SaidiAutomated merge with repo.m5sim.org/m5-stable
2008-06-21 Steve ReinhardtGenerate more useful error messages for unconnected...
2008-06-13 Steve ReinhardtAutomated merge with ssh://m5sim.org//repo/m5
2008-06-13 Steve ReinhardtGet rid of bogus cache assertion.
2008-03-25 Steve ReinhardtAutomated merge with ssh://daystrom.m5sim.org//repo/m5
2008-03-25 Steve ReinhardtFix handling of writeback-induced writebacks in atomic...
2008-03-24 Steve ReinhardtDon't FastAlloc MSHRs since we don't allocate them...
2008-03-23 Steve ReinhardtFix cache problem with writes to tempBlock
2008-03-17 Steve ReinhardtFix a few Packet memory leaks.
2008-03-15 Steve ReinhardtFix subtle cache bug where read could return stale...
2008-02-27 Steve ReinhardtAutomated merge with ssh://daystrom.m5sim.org//repo/m5
2008-02-27 Steve ReinhardtRevamp cache timing access mshr check to make stats...
2008-02-27 Steve ReinhardtCache: better comments particularly regarding writeback...
2008-02-16 Steve ReinhardtMake L2+ caches allocate new block for writeback misses
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig
2008-02-10 Steve ReinhardtFix #include lines for renamed cache files.
2008-01-06 Geoffrey BlakeTemporary fix for ll/sc bug see flyspray task for more...
2008-01-02 Steve ReinhardtAdd ReadRespWithInvalidate to handle multi-level cohere...
2008-01-02 Steve ReinhardtDon't DPRINTF in the middle of a PrintReq.
2008-01-02 Steve ReinhardtAdd functional PrintReq command for memory-system debug...
2008-01-02 Steve ReinhardtFix formatting and comments in cache_impl.hh
2007-11-20 Gabe BlackMerge with head.
2007-11-17 Steve ReinhardtTweak check for writable block fill.
2007-10-31 Ali Saidino manual changes
2007-10-31 Steve ReinhardtMerge in bus DPRINTF changes.
2007-09-16 Steve Reinhardtmem: clean up bus/cache DPRINTFs a bit
2007-08-30 Miles Kaufmannparams: Deprecate old-style constructors; update most...
2007-08-27 Gabe BlackMerge with head
2007-08-24 Ali SaidiMem: Make errors in the memory system be responses...
2007-08-14 Ali SaidiMerge IGNORE_STYLE change and my change.
2007-08-12 Ali SaidiMemorySystem: Fix the use of ?: to produce correct...
2007-08-12 Nathan Binkertmerge
2007-08-10 Ali SaidiDMA: Add IOCache and fix bus bridge to optionally only...
2007-08-05 Gabe BlackMerge with head.
2007-08-03 Steve Reinhardtmerge from head
2007-08-01 Nathan Binkertmerge: mips fix to getArgument
2007-08-01 Gabe BlackMerge with head.
2007-08-01 Gabe BlackMerge with head.
2007-07-31 Steve ReinhardtMerge from head.
2007-07-30 Steve Reinhardtmemory system: fix functional access bug.
2007-07-29 Steve ReinhardtMerge Gabe's changes from head.
2007-07-29 Nathan Binkertmerge: style.py fix
2007-07-29 Nathan Binkertmerge whitespace fixes
2007-07-29 Nathan Binkertmerge whitespace changes
2007-07-27 Steve Reinhardtcache/memtest: fixes for functional accesses.
2007-07-27 Steve Reinhardtcache: Get rid of unused variable.
2007-07-27 Nathan BinkertMerge python and x86 changes with cache branch
2007-07-27 Steve ReinhardtHave owner respond to UpgradeReq to avoid race.
2007-07-27 Steve ReinhardtAdd downward express snoops for invalidations.
2007-07-27 Steve ReinhardtContinue snooping after a writeback is encountered.
2007-07-25 Steve ReinhardtCan't block on memInhibit packets
2007-07-24 Steve ReinhardtA couple more minor bug fixes for multilevel coherence.
2007-07-23 Steve ReinhardtReplace lowerMSHRPending flag with more robust scheme
2007-07-22 Steve ReinhardtMerge from head.
2007-07-22 Steve ReinhardtMerge more changes in from head.
2007-07-22 Steve ReinhardtReplace DeferredSnoop flag with LowerMSHRPending flag.
2007-07-22 Steve ReinhardtMerge Gabe's changes with mine.
2007-07-22 Steve ReinhardtA few minor non-debug compilation issues.
2007-07-22 Steve ReinhardtDeal with invalidations intersecting outstanding upgrades.
2007-07-21 Steve ReinhardtSeveral more fixes for multi-level timing coherence.
2007-07-17 Steve ReinhardtForward cache-to-cache responses through other caches.
2007-07-16 Steve ReinhardtMerge from head.
2007-07-16 Steve ReinhardtFix up a bunch of multilevel coherence issues.
2007-07-14 Steve ReinhardtMove a couple of DPRINTFs from Cache to CachePort.
2007-07-14 Steve ReinhardtMerge from head.
2007-07-14 Steve ReinhardtMerge of DPRINTF fixes from head.
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