git.libre-soc.org Git - gem5.git/history

2016-02-10	Andreas Hansson	mem: Move the point of coherency to the coherent crossbar	blob \| commitdiff \| raw
2015-12-31	Andreas Hansson	mem: Make cache terminology easier to understand	blob \| commitdiff \| raw \| diff to current
2015-11-06	Andreas Hansson	mem: Use the packet delays and do not just zero them out	blob \| commitdiff \| raw \| diff to current
2015-11-06	Andreas Hansson	mem: Align rules for sinking inhibited packets at the...	blob \| commitdiff \| raw \| diff to current
2015-11-06	Andreas Hansson	mem: Unify delayed packet deletion	blob \| commitdiff \| raw \| diff to current
2015-07-13	Andreas Hansson	mem: Fix (ab)use of emplace to avoid temporary object...	blob \| commitdiff \| raw \| diff to current
2015-07-07	Andreas Sandberg	sim: Refactor and simplify the drain API	blob \| commitdiff \| raw \| diff to current
2015-07-07	Andreas Sandberg	sim: Make the drain state a global typed enum	blob \| commitdiff \| raw \| diff to current
2015-03-19	Andreas Hansson	mem: Use emplace front/back for deferred packets	blob \| commitdiff \| raw \| diff to current
2015-03-02	Andreas Hansson	mem: Split port retry for all different packet classes	blob \| commitdiff \| raw \| diff to current
2015-02-11	Marco Balboni	mem: Clarification of packet crossbar timings	blob \| commitdiff \| raw \| diff to current
2014-10-30	Ali Saidi	automated merge	blob \| commitdiff \| raw \| diff to current
2014-10-30	Ali Saidi	arm, mem: Fix drain bug and provide drain prints for...	blob \| commitdiff \| raw \| diff to current
2014-10-16	Andreas Hansson	mem: Dynamically determine page bytes in memory components	blob \| commitdiff \| raw \| diff to current
2014-09-20	Andreas Hansson	mem: Rename Bus to XBar to better reflect its behaviour	blob \| commitdiff \| raw \| diff to current
2014-09-19	Andreas Hansson	mem: Check return value of checkFunctional in SimpleMemory	blob \| commitdiff \| raw \| diff to current
2013-09-18	Andreas Hansson	mem: Fix scheduling bug in SimpleMemory	blob \| commitdiff \| raw \| diff to current
2013-08-19	Andreas Hansson	mem: Add an internal packet queue in SimpleMemory	blob \| commitdiff \| raw \| diff to current
2013-02-19	Andreas Hansson	mem: Enforce strict use of busFirst- and busLastWordTime	blob \| commitdiff \| raw \| diff to current
2013-01-08	Mitch Hayenga	mem: Fix use-after-free bug	blob \| commitdiff \| raw \| diff to current
2012-11-02	Ali Saidi	mem: fix use after free issue in memories until 4-phase...	blob \| commitdiff \| raw \| diff to current
2012-11-02	Andreas Sandberg	sim: Move the draining interface into a separate base...	blob \| commitdiff \| raw \| diff to current
2012-10-15	Andreas Hansson	Port: Add protocol-agnostic ports in the port hierarchy	blob \| commitdiff \| raw \| diff to current
2012-09-18	Andreas Hansson	Mem: Add a maximum bandwidth to SimpleMemory	blob \| commitdiff \| raw \| diff to current
2012-07-12	Andreas Hansson	Mem: Make SimpleMemory single ported	blob \| commitdiff \| raw \| diff to current
2012-07-09	Andreas Hansson	Port: Make getAddrRanges const	blob \| commitdiff \| raw \| diff to current
2012-04-06	Andreas Hansson	MEM: Enable multiple distributed generalized memories	blob \| commitdiff \| raw \| diff to current

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