Mem: Use deque instead of list for bus retries
[gem5.git] / src / mem /
2012-10-15 Andreas HanssonMem: Use deque instead of list for bus retries
2012-10-15 Andreas HanssonFix: Address a few minor issues identified by cppcheck
2012-10-15 Andreas HanssonMem: Use cycles to express cache-related latencies
2012-10-15 Andreas HanssonMem: Use range operations in bus in preparation for...
2012-10-11 Andreas HanssonMem: Determine bus block size during initialisation
2012-10-02 Nilay Vaishruby: makes some members non-static
2012-10-02 Nilay Vaishruby: changes to simple network
2012-10-02 Nilay Vaishruby: rename template_hack to template
2012-10-02 Nilay Vaishruby: remove unused code in protocols
2012-10-02 Nilay Vaishruby: remove some unused things in slicc
2012-10-02 Nilay Vaishruby: move functional access to ruby system
2012-09-30 Nilay VaishMI coherence protocol: add copyright notice
2012-09-25 Djordje KovacevicMEM: Put memory system document into doxygen
2012-09-25 Mrinmoy GhoshCache: add a response latency to the caches
2012-09-25 Ali Saidimem: Add a gasket that allows memory ranges to be re...
2012-09-23 Joel HestnessRubyPort and Sequencer: Fix draining
2012-09-21 Andreas HanssonDRAM: Introduce SimpleDRAM to capture a high-level...
2012-09-21 Andreas HanssonMem: Tidy up bus member variables types
2012-09-20 Anthony Gutierrezbus: removed outdated warn regarding 64 B block sizes
2012-09-19 Andreas HanssonMem: Remove the file parameter from AbstractMemory
2012-09-19 Andreas HanssonAddrRange: Transition from Range<T> to AddrRange
2012-09-19 Nilay Vaishruby: eliminate typedef integer_t
2012-09-19 Nilay Vaishruby: avoid using g_system_ptr for event scheduling
2012-09-18 Andreas HanssonMem: Add a maximum bandwidth to SimpleMemory
2012-09-14 Andreas Hanssonscons: Use c++0x with gcc >= 4.4 instead of 4.6
2012-09-12 Jason PowerRuby: Modify Scons so that we can put .sm files in...
2012-09-11 Andreas Hanssonclang: Fix issues identified by the clang static analyzer
2012-09-11 Lena OlsonCache: Split invalidateBlk up to seperate block vs...
2012-09-11 Nilay VaishRuby: Use uint32_t instead of uint32 everywhere
2012-09-11 Nilay VaishRuby: Use uint8_t instead of uint8 everywhere
2012-09-10 Nilay VaishRuby System: Convert to Clocked Object
2012-09-10 Nilay VaishRuby Slicc: remove the call to cin.get() function
2012-09-10 Marco ElverMem: Allow serializing of more than INT_MAX bytes
2012-09-07 Andreas HanssonParam: Transition to Cycles for relevant parameters
2012-09-06 Joel HestnessRuby Memory Controller: Fix clocking
2012-08-28 Jason PowerRuby: Correct DataBlock =operator
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable
2012-08-28 Andreas HanssonPort: Stricter port bind/unbind semantics
2012-08-27 Nilay VaishRuby: remove README.debugging and Decommissioning_note
2012-08-27 Nilay VaishRuby: Remove RubyEventQueue
2012-08-27 Nilay VaishRuby Memory Vector: Allow more than 4GB of memory
2012-08-25 Nilay VaishMESI Protocol: Correct the virtual network in profile...
2012-08-25 Nilay VaishMESI Coherence Protocol: Add copyright notice
2012-08-22 Andreas HanssonPacket: Remove NACKs from packet and its use in endpoints
2012-08-22 Andreas HanssonBridge: Remove NACKs in the bridge and unify with packe...
2012-08-22 Andreas HanssonPort: Extend the QueuedPort interface and use where...
2012-08-21 Andreas HanssonPacketQueue: Allow queuing in the same tick as desired...
2012-08-21 Andreas HanssonClock: Move the clock and related functions to ClockedO...
2012-08-19 Nilay VaishRuby Banked Array: add copyrights
2012-08-17 Jason PowerRuby: Add RubySystem parameter to MemoryControl
2012-08-15 Anthony GutierrezO3,ARM: fix some problems with drain/switchout function...
2012-08-10 Jason PowerRuby: Clean up topology changes
2012-08-06 Steve ReinhardtSETranslatingPortProxy: fix bug in tryReadString()
2012-08-01 Jason PowerRuby NetDest: add assert for bad element in netdest
2012-07-27 Anthony Gutierrezcache: don't allow dirty data in the i-cache
2012-07-23 Andreas HanssonBridge: Use EventWrapper instead of Event subclass...
2012-07-12 Andreas HanssonMem: Make SimpleMemory single ported
2012-07-12 Nilay VaishRuby: remove config information from ruby.stats
2012-07-12 Nilay VaishRuby: remove some unused stuff from SLICC files
2012-07-11 Brad Beckmannruby: improved DRAM reset comment
2012-07-11 Brad Beckmann# User Brad Beckmann <Brad.Beckmann@amd.com>
2012-07-11 Brad Beckmann# User Brad Beckmann <Brad.Beckmann@amd.com>
2012-07-11 Brad Beckmannimported patch jason/slicc-external-structure-fix
2012-07-11 Brad Beckmannruby: banked cache array resource model
2012-07-11 Joel Hestnessruby: tag and data cache access support
2012-07-11 Nuwan Jayasenaruby: adds reset function to Ruby memory controllers
2012-07-11 Nuwan Jayasenaruby: memory controllers now inherit from an abstract...
2012-07-11 Brad Beckmannruby: changes how Topologies are created
2012-07-09 Andreas HanssonMem: Make members relating to range and size constant
2012-07-09 Andreas HanssonPort: Hide the queue implementation in SimpleTimingPort
2012-07-09 Andreas HanssonPort: Align port names in C++ and Python
2012-07-09 Andreas HanssonBus: Make the default bus width 8 bytes instead of 64
2012-07-09 Andreas HanssonBus: Split the bus into separate request/response layers
2012-07-09 Andreas HanssonBus: Add a notion of layers to the buses
2012-07-09 Andreas HanssonBus: Replace tickNextIdle and inRetry with a state...
2012-07-09 Andreas HanssonPort: Make getAddrRanges const
2012-07-09 Andreas HanssonPort: Add getAddrRanges to master port (asking slave...
2012-07-09 Andreas HanssonPort: Add isSnooping to slave port (asking master port)
2012-07-09 Andreas HanssonPort: Move retry from port base class to Master/SlavePort
2012-07-09 Andreas HanssonFix: Address a few benign memory leaks
2012-06-29 Lena OlsonCache: Fix the LRU policy for classic memory hierarchy
2012-06-29 Uri WienerBus: enable non/coherent buses sub-classes
2012-06-29 Dam SunwooMem: fix master id assertion in cache_impl.hh
2012-06-29 Matt EvansMem: Fix a livelock resulting in LLSC/locked memory...
2012-06-29 Ali SaidiCache: Only invalidate a line in the cache when an...
2012-06-07 Ali Saidimem: Delay deleting of incoming packets by one call.
2012-06-05 Dam SunwooMem: add per-master stats to physmem
2012-06-05 Ali Saidisim: Remove FastAlloc
2012-05-31 Andreas HanssonBus: Split the bus into a non-coherent and coherent bus
2012-05-30 Andreas HanssonBus: Remove redundant packet parameter from isOccupied
2012-05-30 Andreas HanssonBus: Turn the PortId into a transport function parameter
2012-05-30 Andreas HanssonPacket: Unify the use of PortID in packet and port
2012-05-30 Andreas HanssonPacket: Updated comments for src and dest fields
2012-05-30 Andreas HanssonBridge: Split deferred request, response and sender...
2012-05-24 Andreas HanssonCache: Remove dangling doWriteback declaration
2012-05-23 Andreas HanssonPacket: Cleaning up packet command and attribute
2012-05-22 Nilay VaishRuby: Remove the unused src/mem/ruby/common/Driver...
2012-05-22 Nilay VaishRuby Sequencer: Schedule deadlock check event at correc...
2012-05-10 Ali Saidimem: fix bug with CopyStringOut and null string termina...
2012-05-10 Ali SaidiCache: restructure code that actually isn't a loop
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