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arch,x86,mem: Dynamically determine the ISA for Ruby store check
[gem5.git]
/
src
/
mem
/
2014-10-16
Andreas Hansson
arch,x86,mem: Dynamically determine the ISA for Ruby...
tree
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commitdiff
2014-10-16
Andreas Hansson
mem: Dynamically determine page bytes in memory components
tree
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commitdiff
2014-10-11
Nilay Vaish
ruby: network: garnet: add statistics for different...
tree
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commitdiff
2014-10-11
Nilay Vaish
ruby: network: garnet: remove functions for computing...
tree
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commitdiff
2014-10-11
Nilay Vaish
ruby: drop Orion network power model
tree
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commitdiff
2014-10-11
Nilay Vaish
ruby: mesi: slight renaming
tree
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commitdiff
2014-10-11
Nilay Vaish
ruby: structures: coorect #ifndef macros in header...
tree
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commitdiff
2014-07-29
Omar Naji
mem: DRAMPower integration for on-line DRAM power stats
tree
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commitdiff
2014-07-29
Omar Naji
mem: Add DRAMPower wrapping class
tree
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commitdiff
2014-07-25
Omar Naji
mem: Add missig timing and current parameters to DRAM...
tree
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commitdiff
2014-10-09
Omar Naji
mem: Remove DRAMSim2 DDR3 configuration
tree
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commitdiff
2014-10-09
Andreas Hansson
mem: Add packet sanity checks to cache and MSHRs
tree
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commitdiff
2014-10-09
Andreas Hansson
mem: Allow packet queue to move next send event forward
tree
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commitdiff
2014-10-01
Andreas Hansson
misc: Fix issues identified by static analysis
tree
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commitdiff
2014-09-27
Curtis Dunham
mem: Output precise range when XBar has conflicts
tree
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commitdiff
2014-09-27
Curtis Dunham
mem: Provide better diagnostic for unconnected port
tree
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commitdiff
2014-09-27
Andreas Hansson
misc: Fix a bunch of minor issues identified by static...
tree
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commitdiff
2014-09-20
Andreas Hansson
mem: Rename Bus to XBar to better reflect its behaviour
tree
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commitdiff
2014-04-25
Stephan Diestelhorst
mem: Add access statistics for the snoop filter
tree
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commitdiff
2014-09-20
Stephan Diestelhorst
mem: Tie in the snoop filter in the coherent bus
tree
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commitdiff
2014-04-24
Stephan Diestelhorst
mem: Add a simple snoop counter per bus
tree
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commitdiff
2014-09-20
Stephan Diestelhorst
mem: Simple Snoop Filter
tree
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commitdiff
2014-09-20
Wendy Elsasser
mem: Add DDR4 bank group timing
tree
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commitdiff
2014-09-20
Wendy Elsasser
mem: Add memory rank-to-rank delay
tree
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commitdiff
2014-09-20
Mitch Hayenga
mem: Remove the GHB prefetcher from the source tree
tree
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commitdiff
2014-09-19
Andreas Hansson
misc: Use safe_cast when assumptions are made about...
tree
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commitdiff
2014-09-19
Andreas Hansson
misc: Remove assertions ensuring unsigned values >= 0
tree
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commitdiff
2014-09-19
Andreas Hansson
mem: Check return value of checkFunctional in SimpleMemory
tree
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commitdiff
2014-09-19
Andreas Hansson
mem: Add checks to sendTimingReq in cache
tree
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commitdiff
2014-09-15
Nilay Vaish
ruby: network: revert some of the changes from ad9c042dce54
tree
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commitdiff
2014-09-09
Mitch Hayenga
mem: Add accessor function for vaddr
tree
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commitdiff
2014-09-09
Andreas Hansson
misc: Fix a number of unitialised variables and members
tree
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commitdiff
2014-09-03
Andreas Hansson
base: Use the global Mersenne twister throughout
tree
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commitdiff
2014-09-03
Andreas Hansson
mem: Avoid unecessary retries when bus peer is not...
tree
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commitdiff
2014-06-27
Curtis Dunham
mem: write streaming support via WriteInvalidate promotion
tree
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commitdiff
2014-09-03
Andreas Hansson
mem: Fix a bug in the cache port flow control
tree
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commitdiff
2014-05-13
Curtis Dunham
cpu, mem: Make software prefetches non-blocking
tree
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commitdiff
2014-05-13
Curtis Dunham
mem: Refactor assignment of Packet types
tree
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commitdiff
2014-09-03
Geoffrey Blake
cache: Fix handling of LL/SC requests under contention
tree
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commitdiff
2014-09-03
Andreas Hansson
mem: Packet queue clean up
tree
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commitdiff
2014-09-03
Andreas Hansson
arch: Cleanup unused ISA traits constants
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: remove typedef of Index as int64
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: PerfectSwitch: moves code to a per vnet helper...
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: message buffers: significant changes
tree
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commitdiff
2014-09-01
Nilay Vaish
build opts: add MI_example to NULL ISA
tree
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commitdiff
2014-09-01
Nilay Vaish
mem: change the namespace Message to ProtoMessage
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: slicc: change the way configurable members are...
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: slicc: improve the grammar
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: mesi three level: slight naming changes.
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: slicc: donot prefix machine name to variables
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: remove unused toString() from AbstractController
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: network: move getNumNodes() to base class
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: eliminate type Time
tree
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commitdiff
2014-09-01
Nilay Vaish
ruby: move files from ruby/system to ruby/structures
tree
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commitdiff
2014-08-28
Alexandru
mem: adding architectural page table support for SE...
tree
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commitdiff
2014-04-01
Alexandru
mem: adding a multi-level page table class
tree
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commitdiff
2014-08-26
Andreas Hansson
mem: Fix DRAMSim2 cycle check when restoring from check...
tree
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commitdiff
2014-08-26
Andreas Hansson
mem: Update DRAM controller comments
tree
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commitdiff
2014-08-26
Andreas Hansson
mem: Fix address interleaving bug in DRAM controller
tree
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commitdiff
2014-08-13
Mitch Hayenga
mem: Properly set cache block status fields on writebacks
tree
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commitdiff
2014-07-28
Anthony Gutierrez
mem: refactor LRU cache tags and add random replacement...
tree
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commitdiff
2014-06-30
Andreas Hansson
mem: DRAMPower trace output
tree
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commitdiff
2014-06-30
Andreas Hansson
mem: Add bank and rank indices as fields to the DRAM...
tree
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commitdiff
2014-06-30
Andreas Hansson
mem: Extend DRAM row bits from 16 to 32 for larger...
tree
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commitdiff
2014-06-01
Steve Reinhardt
style: eliminate equality tests with true and false
stable_2014_08_26
tree
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commitdiff
2014-05-23
Nilay Vaish
ruby: slicc: remove unused ids DNUCA*
tree
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commitdiff
2014-05-23
Nilay Vaish
ruby: remove old protocol documentation
tree
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commitdiff
2014-05-23
Nilay Vaish
ruby: message buffer: drop dequeue_getDelayCycles()
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Update DDR3 and DDR4 based on datasheets
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Add DRAM cycle time
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Simplify DRAM response scheduling
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Add precharge all (PREA) to the DRAM controller
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Remove printing of DRAM params
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Add tRTP to the DRAM controller
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Merge DRAM latency calculation and bank state...
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Add tWR to DRAM activate and precharge constraints
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Merge DRAM page-management calculations
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Add DRAM power states to the controller
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Ensure DRAM refresh respects timings
tree
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commitdiff
2014-05-09
Andreas Hansson
mem: Make DRAM read/write switching less conservative
tree
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commitdiff
2014-05-09
Mitch Hayenga
mem: Squash prefetch requests from downstream caches
tree
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commitdiff
2014-05-09
Sascha Bischoff
mem: Auto-generate CommMonitor trace file names
tree
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commitdiff
2014-04-01
Mitch Hayenga
mem: Don't print out the data of a cache block
tree
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commitdiff
2014-04-19
Nilay Vaish
ruby: slicc: remove old documentation
tree
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commitdiff
2014-04-19
Nilay Vaish
ruby: slicc: slight change to rule for transitions
tree
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commitdiff
2014-04-19
Marco Elver
ruby: recorder: Fix (de-)serializing with different...
tree
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commitdiff
2014-04-08
Nilay Vaish
ruby: slicc: change enqueue statement
tree
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commitdiff
2014-04-08
Nilay Vaish
ruby: coherence protocols: drop the phrase IntraChip
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: Track DRAM read/write switching and add hysteresis
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: Rename SimpleDRAM to a more suitable DRAMCtrl
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: Change memory defaults to be more representative
tree
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commitdiff
2014-03-23
Wendy Elsasser
mem: Add close adaptive paging policy to DRAM controlle...
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: DRAM controller tidying up
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: Fix bug in DRAM bytes per activate
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: Limit the accesses to a page before forcing a...
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: Make DRAM write queue draining more aggressive
tree
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commitdiff
2014-03-23
Neha Agarwal
mem: DDR3 config for comparing with DRAMSim2
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: More descriptive address-mapping scheme names
tree
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commitdiff
2014-03-23
Andreas Hansson
ruby: Move Ruby debug flags to ruby dir and remove...
tree
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commitdiff
2014-03-23
Andreas Hansson
mem: Include the DRAMSim2 wrapper in NULL build
tree
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commitdiff
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