syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.
[gem5.git] / src / mem /
2009-04-21 Steve ReinhardtMinor tweaks for future Ruby compatibility.
2009-04-21 Steve Reinhardtrequest: add PREFETCH flag.
2009-04-21 Steve Reinhardtrequest: rename INST_READ to INST_FETCH.
2009-04-21 Steve Reinhardtrequest: split public and private flags into separate...
2009-04-20 Gabe BlackMem: Fill out the comment that describes the LOCKED...
2009-04-20 Gabe BlackMem: Change isLlsc to isLLSC.
2009-04-19 Gabe BlackMemory: Add a LOCKED flag back in for x86 style locking.
2009-04-19 Gabe BlackMemory: Rename LOCKED for load locked store conditional...
2009-04-19 Gabe BlackX86: Add a function which gets called when an interrupt...
2009-04-19 Gabe BlackX86: Fix the flags for interrupt response messages.
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not...
2009-03-12 Steve Reinhardtcache: set dirty bit on swaps (oops!)
2009-03-11 Steve Reinhardtprefetch: don't panic on requests w/o contextID (e...
2009-03-06 Nathan Binkertstats: Fix all stats usages to deal with template fixes
2009-02-25 Gabe BlackCPU: Get rid of translate... functions from various...
2009-02-16 Lisa Hsusycalls: implement mremap() and add DATA flag for getrl...
2009-02-16 Steve ReinhardtFixes to get prefetching working again.
2009-01-13 Nathan BinkertSCons: centralize the Dir() workaround for newer versio...
2008-12-06 Nathan Binkertflags: Change naming of functions to be clearer
2008-11-15 Steve Reinhardtsyscalls: fix latent brk/obreak bug.
2008-11-14 Steve ReinhardtCache: get rid of obsolete Tag methods.
2008-11-14 Nathan BinkertFix a bunch of bugs I introduced when I changed the...
2008-11-14 Gabe BlackCPU: Refactor read/write in the simple timing CPU.
2008-11-10 Nathan BinkertClean up the SimpleTimingPort class a little bit.
2008-11-10 Nathan Binkertstyle: clean up the Packet stuff
2008-11-10 Steve Reinhardtmem: Assert that requests have non-negative size.
2008-11-10 Steve ReinhardtCache: Refactor packet forwarding a bit.
2008-11-04 Lisa Hsudecouple eviction from insertion in the cache.
2008-11-04 Lisa HsuChange the findBlock(addr, lat) to accessBlock, which...
2008-11-04 Lisa Hsuget rid of all instances of readTid() and getThreadNum...
2008-11-03 Lisa HsuAdd in Context IDs to the simulator. From now on,...
2008-10-23 Lisa Hsus/cpu_id/cpuId in o3 (to be consistent and match style...
2008-10-23 Lisa Hsuprobe function no longer used anywhere.
2008-10-23 Lisa Hsuremove the totally obsolete split cache
2008-10-20 Lisa HsuAutomated merge with ssh://daystrom.m5sim.org//z/repo/m5
2008-10-16 Lisa HsuAutomated merge with ssh://daystrom.m5sim.org//z/repo/m5
2008-10-14 Lisa HsuThis function declaration isn't used anywhere.
2008-10-13 Gabe BlackGet rid of some commented out code.
2008-10-12 Gabe BlackCreate a message port for sending messages as apposed...
2008-10-09 Nathan Binkertmem: Add a method for setting the time on a packet.
2008-10-09 Nathan Binkerteventq: convert all usage of events to use the new...
2008-10-09 Nathan Binkerteventq: Major API change for the Event and EventQueue...
2008-09-26 Nathan BinkertWhen nesting if statements, use braces to avoid ambiguo...
2008-09-10 Ali Saidistyle: Remove non-leading tabs everywhere they shouldn...
2008-08-11 Nathan Binkertparams: Get rid of the remnants of the old style parame...
2008-08-03 Steve ReinhardtMake default PhysicalMemory latency slightly more reali...
2008-07-15 Steve ReinhardtUse ReadResp instead of LoadLockedResp for LoadLockedRe...
2008-07-15 Steve ReinhardtAdd missing newlines to Bus DPRINTFs.
2008-07-01 Ali SaidiRemove delVirtPort() and make getVirtPort() only return...
2008-07-01 Ali SaidiChange everything to use the cached virtPort rather...
2008-06-28 Steve ReinhardtAutomated merge after backout.
2008-06-28 Steve ReinhardtBacked out changeset 94a7bb476fca: caused memory leak.
2008-06-24 Ali SaidiAutomated merge with repo.m5sim.org/m5-stable
2008-06-21 Steve ReinhardtMake bus address conflict error more informative
2008-06-21 Steve ReinhardtGenerate more useful error messages for unconnected...
2008-06-16 Nathan Binkertphysmem: Add a null option to physical memory so it...
2008-06-16 Nathan Binkertport: Clean up default port setup and port switchover...
2008-06-15 Nathan BinkertMemReq: Add option to reset the time on a request.
2008-06-13 Steve ReinhardtAutomated merge with ssh://m5sim.org//repo/m5
2008-06-13 Steve ReinhardtGet rid of bogus bus assertion.
2008-06-13 Steve ReinhardtGet rid of bogus cache assertion.
2008-05-15 Ali SaidiMake sure that output files are always checked success...
2008-04-10 Ali SaidiSCons: add comments to SConscript documenting bug worka...
2008-04-10 Ali SaidiPhysicalMemory: Add parameter for variance in memory...
2008-04-08 Ali SaidiSCons: Manually specifying header only directories...
2008-03-25 Steve ReinhardtAutomated merge with ssh://daystrom.m5sim.org//repo/m5
2008-03-25 Steve ReinhardtFix handling of writeback-induced writebacks in atomic...
2008-03-24 Steve ReinhardtDelete the Request for a no-response Packet
2008-03-24 Steve ReinhardtDon't FastAlloc MSHRs since we don't allocate them...
2008-03-23 Steve ReinhardtFix cache problem with writes to tempBlock
2008-03-17 Steve ReinhardtFix a few Packet memory leaks.
2008-03-17 Steve ReinhardtRestructure bus timing calcs to cope with pkt being...
2008-03-15 Steve ReinhardtFix subtle cache bug where read could return stale...
2008-02-27 Steve ReinhardtAutomated merge with ssh://daystrom.m5sim.org//repo/m5
2008-02-27 Steve ReinhardtRevamp cache timing access mshr check to make stats...
2008-02-27 Steve ReinhardtCache: better comments particularly regarding writeback...
2008-02-26 Gabe BlackBus: Fix the bus timing to be more realistic.
2008-02-16 Steve ReinhardtMake L2+ caches allocate new block for writeback misses
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig
2008-02-11 Nicolas ZeaBus: Only update port cache when there is an item to...
2008-02-10 Steve ReinhardtFix #include lines for renamed cache files.
2008-02-10 Steve ReinhardtRename cache files for brevity and consistency with...
2008-02-06 Stephen HinesMake the Event::description() a const function
2008-01-06 Geoffrey BlakeTemporary fix for ll/sc bug see flyspray task for more...
2008-01-02 Steve ReinhardtAdd ReadRespWithInvalidate to handle multi-level cohere...
2008-01-02 Steve ReinhardtMark cache-to-cache MSHRs as downstreamPending when...
2008-01-02 Steve ReinhardtDon't DPRINTF in the middle of a PrintReq.
2008-01-02 Steve ReinhardtBug fix: functional cache port now needs otherPort...
2008-01-02 Steve ReinhardtAdditional comments and helper functions for PrintReq.
2008-01-02 Steve ReinhardtAdd functional PrintReq command for memory-system debug...
2008-01-02 Steve ReinhardtFix formatting and comments in cache_impl.hh
2007-11-29 Ali Saidimerge, no manual changes
2007-11-28 Gabe BlackMake ports that aren't connected to anything fail more...
2007-11-20 Gabe BlackMerge with head.
2007-11-19 Ali SaidiMemory: Cache the physical memory start and size so...
2007-11-17 Steve ReinhardtTweak check for writable block fill.
2007-11-17 Steve ReinhardtFix bug on exclusive response to ReadReq with pending...
2007-11-15 Korey Sewellmerge Ali's config change...
2007-11-15 Korey Sewellbranch merge
2007-11-15 Ali SaidiCheckpointing: Name SE page table entries better so...
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