misc: quote args in echoed command line
[gem5.git] / src / mem /
2015-03-23 Andreas Hanssonmem: Tidy up Request
2015-03-19 Andreas Hanssonmem: Use emplace front/back for deferred packets
2015-03-19 Geoffrey Blakemem: Enable CommMonitor to output traces in atomic...
2015-02-11 Steve Reinhardtmem: remove redundant test in in Cache::recvTimingResp()
2015-02-11 Steve Reinhardtmem: add local var in Cache::recvTimingResp()
2015-02-11 Steve Reinhardtmem: restructure Packet cmd initialization a bit more
2015-03-14 Steve Reinhardtmem: clean up write buffer check in Cache::handleSnoop()
2015-03-02 Andreas Hanssonmem: Unify all cache DPRINTF address formatting
2015-03-02 Andreas Hanssonmem: Fix cache MSHR conflict determination
2015-03-02 Andreas Hanssonmem: Add byte mask to Packet::checkFunctional
2015-03-02 Stephan Diestelhorstmem: Add option to force in-order insertion in PacketQueue
2015-03-02 Marco Balbonimem: Downstream components consumes new crossbar delays
2015-03-02 Andreas Hanssonmem: Move crossbar default latencies to subclasses
2015-03-02 Marco Balbonimem: Add crossbar latencies
2015-03-02 Andreas Hanssonmem: Tidy up the cache debug messages
2015-03-02 Andreas Hanssonmem: Split port retry for all different packet classes
2015-03-02 Ali Jafrimem: Fix prefetchSquash + memInhibitAsserted bug
2015-02-26 Jason PowerRuby: Update backing store option to propagate through...
2015-02-16 Stephan Diestelhorstmem: Fix initial value problem with MemChecker
2015-02-16 Andreas Hanssonmem: mmap the backing store with MAP_NORESERVE
2015-02-16 Andreas Hanssonmem: Use the range cache for lookup as well as access
2015-02-11 Marco Balbonimem: Clarification of packet crossbar timings
2015-02-11 Marco Balbonimem: Clarify usage of latency in the cache
2015-02-03 Andreas Hanssonmem: Clarify express snoop behaviour
2015-02-03 Andreas Hanssonmem: Clarify cache behaviour for pending dirty responses
2015-02-03 Andreas Hanssonconfig: Adjust DRAM channel interleaving defaults
2015-01-22 Andreas Hanssonmem: Remove unused Packet src and dest fields
2015-01-22 Andreas Hanssonmem: Remove Packet source from ForwardResponseRecord
2015-01-22 Andreas Hanssonmem: Remove unused RequestState in the bridge
2015-01-22 Andreas Hanssonmem: Always use SenderState for response routing in...
2015-01-22 Andreas Hanssonmem: Make the XBar responsible for tracking response...
2015-01-22 Andreas Hanssonmem: Clean up Request initialisation
2015-01-20 Andreas Hanssonmem: Fix bug in cache request retry mechanism
2015-01-20 Andreas Hanssonmem: Move DRAM interleaving check to init
2014-12-23 Mitch Hayengamem: Change prefetcher to use random_mt
2014-12-23 Curtis Dunhammem: Hide WriteInvalidate requests from prefetchers
2014-12-23 Mitch Hayengamem: Fix event scheduling issue for prefetches
2014-12-23 Mitch Hayengamem: Fix bug relating to writebacks and prefetches
2014-12-23 Mitch Hayengamem: Rework the structuring of the prefetchers
2014-12-23 Mitch Hayengamem: Add parameter to reserve MSHR entries for demand...
2014-12-23 Andreas Hanssonconfig: Expose the DRAM ranks as a command-line option
2014-12-23 Andreas Hanssonmem: Ensure DRAM controller is idle when in atomic...
2014-12-23 Omar Najimem: Add rank-wise refresh to the DRAM controller
2014-12-23 Omar Najimem: Fix a bug in the DRAM controller arbitration
2014-12-23 Kanishk Sugandmem: Add stack distance statistics to the CommMonitor
2014-12-23 Kanishk Sugandmem: Add a stack distance calculator
2014-12-23 Marco Elvermem: Add MemChecker and MemCheckerMonitor
2014-12-02 Curtis Dunhammem: Support WriteInvalidate (again)
2014-12-02 Curtis Dunhammem: Remove WriteInvalidate support
2014-12-02 Andreas Hanssonmem: Relax packet src/dest check and shift onus to...
2014-12-02 Andreas Hanssonmem: Clean up packet data allocation
2014-12-02 Andreas Hanssonmem: Cleanup Packet::checkFunctional and hasData usage
2014-12-02 Andreas Hanssonmem: Make the requests carried by packets const
2014-12-02 Andreas Hanssonmem: Make Request getters const
2014-12-02 Andreas Hanssonmem: Add checks and explanation for assertMemInhibit...
2014-12-02 Andreas Hanssonmem: Assume all dynamic packet data is array allocated
2014-12-02 Andreas Hanssonmem: Remove redundant Packet::allocate calls
2014-12-02 Andreas Hanssonmem: Use const pointers for port proxy write functions
2014-12-02 Andreas Hanssonmem: Add const getters for write packet data
2014-12-02 Andreas Hanssonmem: Remove null-check bypassing in Packet::getPtr
2014-12-02 Omar Najimem: Add a GDDR5 DRAM config
2014-11-24 Andreas Hanssonmisc: Another round of static analysis fixups
2014-11-24 Alexandru Dutumem: Page Table map api modification
2014-11-24 Alexandru Dutumem: Multi Level Page Table bug fix
2014-11-24 Alexandru Dutumem: Page Table long lines
2014-11-14 Andreas Hanssonmem: Clarify unit of DRAM controller buffer size
2014-11-12 Mitch Hayengamem: Delete unused variable in Garnet NetworkLink
2014-11-06 Nilay Vaishruby: provide a backing store
2014-11-06 Nilay Vaishruby: interface with classic memory controller
2014-11-06 Nilay Vaishruby: remove the function functionalReadBuffers()
2014-11-06 Nilay Vaishruby: coherence protocols: remove data block from dirct...
2014-11-06 Nilay Vaishruby: slicc: allow adding a bool to an int, like C++.
2014-11-06 Nilay Vaishruby: remove sparse memory.
2014-11-06 Nilay Vaishruby: single physical memory in fs mode
2014-11-06 Nilay Vaishruby: dma sequencer: remove RubyPort as parent class
2014-10-30 Ali Saidiautomated merge
2014-10-30 Ali Saidiarm, mem: Fix drain bug and provide drain prints for...
2014-10-21 Curtis Dunhammem: don't inhibit WriteInv's or defer snoops on their...
2014-10-30 Curtis Dunhammem: have WriteInvalidate obsolete MSHRs
2014-10-20 Omar Najimem: Fix DRAM activationlLimit bug
2014-10-20 Omar Najimem: Add DRAM device size and check against config
2014-10-16 Andreas Hanssonmem: Modernise PhysicalMemory with C++11 features
2014-10-16 Andreas Hanssonmisc: Move AddrRangeList from port.hh to addr_range.hh
2014-10-16 Andrew Bardsleymem: Add ExternalMaster and ExternalSlave ports
2014-10-16 Andreas Hanssonmem: Use shared_ptr for Ruby Message classes
2014-10-16 Andreas Hanssonarch,x86,mem: Dynamically determine the ISA for Ruby...
2014-10-16 Andreas Hanssonmem: Dynamically determine page bytes in memory components
2014-10-11 Nilay Vaishruby: network: garnet: add statistics for different...
2014-10-11 Nilay Vaishruby: network: garnet: remove functions for computing...
2014-10-11 Nilay Vaishruby: drop Orion network power model
2014-10-11 Nilay Vaishruby: mesi: slight renaming
2014-10-11 Nilay Vaishruby: structures: coorect #ifndef macros in header...
2014-07-29 Omar Najimem: DRAMPower integration for on-line DRAM power stats
2014-07-29 Omar Najimem: Add DRAMPower wrapping class
2014-07-25 Omar Najimem: Add missig timing and current parameters to DRAM...
2014-10-09 Omar Najimem: Remove DRAMSim2 DDR3 configuration
2014-10-09 Andreas Hanssonmem: Add packet sanity checks to cache and MSHRs
2014-10-09 Andreas Hanssonmem: Allow packet queue to move next send event forward
2014-10-01 Andreas Hanssonmisc: Fix issues identified by static analysis
2014-09-27 Curtis Dunhammem: Output precise range when XBar has conflicts
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