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cpu: Added interface for vector reg file
[gem5.git]
/
src
/
sim
/
System.py
2017-05-02
Andreas Sandberg
python: Use PyBind11 instead of SWIG for Python wrappers
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2017-02-14
Curtis Dunham
sim, kvm: make KvmVM a System parameter
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2017-02-14
Curtis Dunham
sim,kvm,arm: fix typos
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2017-01-03
Andreas Sandberg
sim: Remove redundant export_method_cxx_predecls
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2016-12-19
Andreas Sandberg
sim: Remove redundant buildEnv import
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2015-05-12
David Guillen Fandos
sim: Adding thermal model support
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2015-12-18
Andreas Sandberg
sim: Use the old work item behavior by default
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2015-12-14
Andreas Sandberg
sim: Add an option to forward work items to Python
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2015-09-30
Mitch Hayenga
cpu: Change thread assignments for heterogenous SMT
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2015-02-16
Andreas Hansson
mem: mmap the backing store with MAP_NORESERVE
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2014-08-13
Dam Sunwoo
sim: remove kernel mapping check for baremetal workloads
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2014-06-30
Stephan Diestelhorst
power: Add basic DVFS support for gem5
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2014-01-24
ARM gem5 Developers
arm: Add support for ARMv8 (AArch64 & AArch32)
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2013-07-18
Andreas Hansson
mem: Set the cache line size on a system level
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2013-06-27
Akash Bagdia
config: Add a system clock command-line option
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2013-02-15
Andreas Sandberg
sim: Add a system-global option to bypass caches
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2013-01-07
Andreas Hansson
config: Do not use hardcoded physmem in fs script
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2012-11-02
Andreas Sandberg
sim: Include object header files in SWIG interfaces
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2012-10-25
Andreas Hansson
dev: Make default clock more reasonable for system...
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2012-10-15
Andreas Hansson
Clock: Inherit the clock from parent by default
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2012-04-06
Andreas Hansson
MEM: Enable multiple distributed generalized memories
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2012-02-13
Andreas Hansson
MEM: Introduce the master/slave port roles in the Pytho...
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2012-02-01
Gabe Black
Merge ... head, hopefully the last time for this batch.
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2012-01-31
Gabe Black
Merge with main repository.
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2012-01-29
Gabe Black
Yet another merge with the main repository.
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2012-01-28
Gabe Black
Merge with the main repo.
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2012-01-16
Gabe Black
Merge yet again with the main repository.
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2012-01-17
Andreas Hansson
MEM: Add the system port as a central access point
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2012-01-10
Prakash Ramrakhyani
sim: Enable sampling of run-time for code-sections...
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2012-01-07
Gabe Black
Another merge with the main repository.
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2012-01-07
Gabe Black
Merge with the main repository again.
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2012-01-07
Gabe Black
Merge with main repository.
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2011-10-31
Gabe Black
System: Push boot_cpu_frequency down into the subclasse...
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2011-10-30
Gabe Black
SE/FS: Make the system object more consistent between...
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2011-10-28
Nilay Vaish
Merged with recent changes.
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2011-10-20
Steve Reinhardt
SimObject: add export_method* hooks to export C++ metho...
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2011-10-20
Steve Reinhardt
scons/swig: refactor some of the scons/SWIG code
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2011-07-10
Ali Saidi
O3: Make sure fetch doesn't go off into the weeds durin...
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2011-02-07
Brad Beckmann
m5: added work completed monitoring support
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2011-02-07
Joel Hestness
mcpat: Adds McPAT performance counters
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2010-09-09
Nathan Binkert
scons: use code_formatter wherever we can in the build...
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2010-08-23
Ali Saidi
Loader: Make the load address mask be a parameter of...
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2010-01-19
Derek Hower
merge
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2009-09-22
Nathan Binkert
python: Move more code into m5.util allow SCons to...
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2009-04-06
Gabe Black
Merge ARM into the head. ARM will compile but may not...
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2009-01-30
Nathan Binkert
Fix typo
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2007-08-03
Steve Reinhardt
merge from head
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2007-08-03
Gabe Black
Merge with head.
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2007-08-03
Nathan Binkert
python: Improve support for python calling back to...
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2007-06-21
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-06-21
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-20
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-06-20
Nathan Binkert
Make sure all parameters have default values if they're
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2007-06-20
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-05-31
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-05-28
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-05-28
Nathan Binkert
Move SimObject python files alongside the C++ and fix
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