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cpu: Added interface for vector reg file
[gem5.git] / src / sim / clock_domain.hh
2016-04-01 Sascha Bischoffsim: Fix clock_domain unserialization blob | commitdiff | raw
2015-10-12 Andreas Hanssonmisc: Add explicit overrides and fix other clang >... blob | commitdiff | raw | diff to current
2015-10-12 Andreas Hanssonmisc: Remove redundant compiler-specific defines blob | commitdiff | raw | diff to current
2015-08-07 Andreas Sandbergsim: Split ClockedObject to make it usable to non-SimOb... blob | commitdiff | raw | diff to current
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class blob | commitdiff | raw | diff to current
2014-06-16 Stephan Diestelhorstenergy: Small extentions and fixes for DVFS handler blob | commitdiff | raw | diff to current
2014-06-30 Stephan Diestelhorstpower: Add basic DVFS support for gem5 blob | commitdiff | raw | diff to current
2014-01-24 Andreas Hanssonsim: Expose the current clock period as a stat blob | commitdiff | raw | diff to current
2013-12-30 Christopher Torngsim: Add support for dynamic frequency scaling blob | commitdiff | raw | diff to current
2013-08-19 Akash Bagdiapower: Add voltage domains to the clock domains blob | commitdiff | raw | diff to current
2013-06-27 Akash Bagdiasim: Add the notion of clock domains to all ClockedObjects blob | commitdiff | raw | diff to current