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dcbz symbol rename
[soc.git]
/
src
/
soc
/
config
/
test
/
2021-10-08
Tobias Platen
dcbz symbol rename
tree
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commitdiff
2021-08-24
Luke Kenneth Casso...
big rename, global/search/replace of ready_o with o_rea...
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commitdiff
2021-07-21
Tobias Platen
revert accidential delete in test_pi2ls.py causing...
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commitdiff
2021-07-21
Tobias Platen
update pi_dcbz function
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commitdiff
2021-07-19
Tobias Platen
src/soc/config/test/test_pi2ls.py: add more debug outputs
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commitdiff
2021-07-11
Tobias Platen
implement pi_dcbz
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commitdiff
2021-05-25
Tobias Platen
wait_ldok: add debug output count
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commitdiff
2021-05-14
Luke Kenneth Casso...
sort out LoadStore1 misalignment FSM, also required...
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commitdiff
2021-05-12
Luke Kenneth Casso...
start doing virtual memory queries via PortInterface...
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commitdiff
2020-08-21
Luke Kenneth Casso...
ld/st bus reduction test operational
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commitdiff
2020-08-21
Luke Kenneth Casso...
first test of down-converted load/store from 64 to...
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commitdiff
2020-07-29
Jacob Lifshay
add __init__.py to all source directories
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commitdiff
2020-07-29
Jacob Lifshay
clean up some tests
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commitdiff
2020-07-29
Jacob Lifshay
format some tests
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commitdiff
2020-07-22
Jacob Lifshay
Merge remote-tracking branch 'origin/master'
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commitdiff
2020-07-22
Jacob Lifshay
format code
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commitdiff
2020-07-08
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
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commitdiff
2020-07-07
Luke Kenneth Casso...
code-shuffle on testing to prepare loading large files...
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commitdiff
2020-07-02
Luke Kenneth Casso...
use Mock class (more convenient)
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commitdiff
2020-07-01
Luke Kenneth Casso...
minor reorg on how Bus and Config classes are set up
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commitdiff
2020-06-29
Luke Kenneth Casso...
fetch instructions from bare wishbone fetch unit
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commitdiff
2020-06-28
Luke Kenneth Casso...
add Config Fetch interface and quick unit test
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commitdiff
2020-06-27
Luke Kenneth Casso...
unit test in l0_cache to connect to testpi and test_bare_wb
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commitdiff
2020-06-27
Luke Kenneth Casso...
fix TestMemLoadStoreUnit, it required a FSM to monitor...
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commitdiff
2020-06-27
Luke Kenneth Casso...
add wishbone Pi2LSUI test
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commitdiff
2020-06-27
Luke Kenneth Casso...
reconfigureable PortInterface testing now possible
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commitdiff
2020-06-26
Luke Kenneth Casso...
load/store unit test needed to wait for busy_o
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commitdiff
2020-06-26
Luke Kenneth Casso...
investigating why write-enable not getting passed through
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commitdiff
2020-06-26
Luke Kenneth Casso...
whoops forgot to call parent elaborate
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commitdiff
2020-06-26
Luke Kenneth Casso...
add test of SRAM through wishbone bus
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commitdiff
2020-06-26
Luke Kenneth Casso...
code-morph which redirects lsmem unit test through...
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commitdiff