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mem-cache: Fix RRPV for RRIP
[gem5.git] / src /
2019-04-11 Anis Peysieuxmem-cache: Fix RRPV for RRIP tree | commitdiff
2019-04-11 Giacomo Travagliniarch-arm: Enable PMSELR_EL0 read in PMU tree | commitdiff
2019-04-10 Gabe Blackmem: Plumb backdoor requests through the xbar classes. tree | commitdiff
2019-04-10 Gabe Blacksystemc: Teach the TLM bridges how to use gem5's new... tree | commitdiff
2019-04-10 Gabe Blackmem: Add sendAtomicBackdoor/recvAtomicBackdoor port... tree | commitdiff
2019-04-10 Nikos Nikolerismem-cache: Fix MSHR handling of cache clean requests tree | commitdiff
2019-04-10 Giacomo Travaglinicpu: O3 switchFreeList checking VecElems instead of... tree | commitdiff
2019-04-08 Jason Lowe-Powerlearning_gem5: Fix vector port panic in SimpleCache tree | commitdiff
2019-04-06 Gabe Blackmem: Add a MemBackdoor type to track memory backdoors. tree | commitdiff
2019-04-05 Nikos Nikoleriscpu: Correctly account for executed instructions in... tree | commitdiff
2019-04-05 Ryan Gambordmem-cache: ambiguous use of abs function tree | commitdiff
2019-04-05 Jason Lowe-Powermem: Reverse order of write/read mem queue check tree | commitdiff
2019-04-04 Javier Buenomem-cache: AMPM Prefetcher fails when restoring from... tree | commitdiff
2019-04-03 Andrea Mondellimisc: Removed inconsistency in O3* debug msgs tree | commitdiff
2019-04-03 Andrea Mondelliarch-mips: added missing override specifier (o3) tree | commitdiff
2019-04-03 Javier Buenomem-cache: Fix PIF prefetcher compilation error with... tree | commitdiff
2019-04-03 Javier Buenomem-cache: ISB prefetcher was triggering an assertion tree | commitdiff
2019-04-03 Javier Buenomem-cache: Fix panic in Indirect Memory prefetcher tree | commitdiff
2019-04-02 Giacomo Travaglinidev-arm: Make GICv3 maintenance interrupt an ArmInterrupt tree | commitdiff
2019-04-02 Ivan Pizarromem-cache: Proactive Instruction Fetch Implementation tree | commitdiff
2019-04-01 Andrea Mondellidev-arm: Correct cast of template parameter tree | commitdiff
2019-03-29 Gabe Blacksystemc: Templatize the gem5/TLM bridge SimObjects. tree | commitdiff
2019-03-29 Gabe Blacksystemc: Delete extra code from src/systemc/tlm_bridge. tree | commitdiff
2019-03-29 Gabe Blacksystemc: Create unified gem5/TLM bridge SimObjects. tree | commitdiff
2019-03-29 Gabe Blacktlm: Initial import of tlm/gem5 bridge code. tree | commitdiff
2019-03-29 Gabe Blacksystemc: Provide a utility Port TLM socket wrapper... tree | commitdiff
2019-03-28 Javier Buenocpu: Added a probe to notify the address of retired... tree | commitdiff
2019-03-28 Daniel R. Carvalhomem-cache: Remove extra cache header from AMAP tree | commitdiff
2019-03-28 Javier Setoainarch-arm: Fix use of bitwise operators on booleans tree | commitdiff
2019-03-28 Giacomo Travagliniarch-arm: Fix index generation for VecElem operands tree | commitdiff
2019-03-27 Giacomo Travaglinidev-arm: Rename GIC maintenance interrupt from ppint... tree | commitdiff
2019-03-27 Giacomo Travaglinidev-arm: Fix GICv3 overflow for INTID > 256 tree | commitdiff
2019-03-27 Giacomo Travaglinidev-arm: Writing ICENABLER for non-SPIs is RAZ/WI ... tree | commitdiff
2019-03-27 Pau Cabrecpu: Fixed the indirect branch predictor GHR handling tree | commitdiff
2019-03-26 Gabe Blackmem: Deleting this init() method was accidentally dropp... tree | commitdiff
2019-03-26 Gabe Blackmem: Clean up the xbars a little. tree | commitdiff
2019-03-26 Gabe Blackbase: Make AddrRangeMap able to return non-const iterators. tree | commitdiff
2019-03-26 Giacomo Travaglinidev-arm: Set/Unset dma coherent mode from python tree | commitdiff
2019-03-26 Isaac Sánchez Barrerabase,python: Fix to allow multiple --debug-ignore values. tree | commitdiff
2019-03-25 Javier Setoainarch-arm: Add missing fall-through defaults tree | commitdiff
2019-03-25 Sandipan Dasarch-power: Rename program counter registers tree | commitdiff
2019-03-25 Sandipan Dasarch-power: Simplify doubleword operand types tree | commitdiff
2019-03-23 Andrea Mondellimisc: missing override specifier tree | commitdiff
2019-03-22 Tiago Mucksim-se: Fixed initialization array size tree | commitdiff
2019-03-22 Giacomo Travaglinibase: Fix CircularQueue's operator-= when negative... tree | commitdiff
2019-03-22 Giacomo Travaglinibase: Fix CircularQueue when diffing iterators tree | commitdiff
2019-03-21 Andrea Mondellidev-arm: ambiguous use of getPort() tree | commitdiff
2019-03-21 Ryan Gambordcpu-kvm: Added informative error message tree | commitdiff
2019-03-20 Javier Buenomem-cache: Added the STeMS prefetcher tree | commitdiff
2019-03-19 Gabe Blacksystemc: Hook up gem5_getPort to the gem5 getPort mecha... tree | commitdiff
2019-03-19 Gabe Blackarch, cpu, dev, gpu, mem, sim, python: start using... tree | commitdiff
2019-03-19 Gabe Blackpython: Switch to the new getPort mechanism to connect... tree | commitdiff
2019-03-19 Gabe Blackmem: Move bind() and unbind() into the Port class. tree | commitdiff
2019-03-19 Gabe Blacksim: Add a getPort function to SimObject. tree | commitdiff
2019-03-18 Gabe Blackpython: Change || to && for MessageBuffers in connectPorts. tree | commitdiff
2019-03-18 Gabe Blackpython: Improve how templated SimObject classes are... tree | commitdiff
2019-03-18 Hoa Nguyenscons: fix disable_partial logic for fast binary tree | commitdiff
2019-03-18 Andrea Mondellimem-cache: tautological comparison of byteOrder tree | commitdiff
2019-03-15 Ryan Gambordmem: Removed circular include ref tree | commitdiff
2019-03-15 Javier Buenomem-cache: Added the Indirect Memory Prefetcher tree | commitdiff
2019-03-15 Gabe Blackmem: Move the Port base class into sim. tree | commitdiff
2019-03-15 Gabe Blackdev: Make EtherInt inherit from Port. tree | commitdiff
2019-03-15 Gabe Blackmem: Track the MemObject owner in MasterPort and SlavePort. tree | commitdiff
2019-03-15 Gabe Blackpython: Simplify connectPorts() around EtherObject... tree | commitdiff
2019-03-15 Gabe Blackdev: Make the EtherDevice class inherit EtherObject. tree | commitdiff
2019-03-15 Gabe Blackdev: Turn EtherObject into an interface class. tree | commitdiff
2019-03-15 Danielmem-cache: Fix write hit latency calculation order tree | commitdiff
2019-03-14 Gabe Blackpython: Teach cxxMethod how to set return_value_policy. tree | commitdiff
2019-03-14 Gabe Blackpython: Teach PyBindMethod how to set return_value_policy. tree | commitdiff
2019-03-14 Andrea Mondellicpu: Refactor of Physical Register implementation tree | commitdiff
2019-03-14 Daniel R. Carvalhopython: Fix unknown params and proxy multiplication tree | commitdiff
2019-03-14 Jairo Balartdev-arm: cleanup of gicv3 CPU interface code and fixes tree | commitdiff
2019-03-14 Giacomo Gabrielliarch-arm,cpu: Add initial support for Arm SVE tree | commitdiff
2019-03-12 Daniel R. Carvalhosim: Add size to array unserialization error message tree | commitdiff
2019-03-12 Jairo Balartdev-arm: cleanup of gicv3 code tree | commitdiff
2019-03-12 Ryan Gambordmem-cache: Removed default arg from get() in prefetch... tree | commitdiff
2019-03-11 Ryan Gambordarch-hsail: changed gen.py shebang from python(3) to... tree | commitdiff
2019-03-11 Ryan Gambordarch-arm: Fixing implicit fallthrough build errors tree | commitdiff
2019-03-11 Daniel R. Carvalhomem-cache: Revert "mem-cache: Remove Packet dependency... tree | commitdiff
2019-03-10 Javier Buenomem-cache: Added extra information to PrefetchInfo tree | commitdiff
2019-03-07 Daniel R. Carvalhomem-cache: Add header delay to handleFill whenReady tree | commitdiff
2019-03-07 Daniel R. Carvalhomem-cache: Allow tag-only accesses on latency calculation tree | commitdiff
2019-03-07 Daniel R. Carvalhomem-cache: Add lookup latency to access' whenReady tree | commitdiff
2019-03-07 Daniel R. Carvalhomem-cache: Fix recvTimingReq doWritebacks tick tree | commitdiff
2019-03-07 Daniel R. Carvalhomem-cache: Use header delay on latency calculation tree | commitdiff
2019-03-07 Daniel R. Carvalhomem-cache: Remove old todo about latency in hit function tree | commitdiff
2019-03-01 Gabe Blacktlm: Add some includes to some tlm_utils header files. tree | commitdiff
2019-03-01 Andreas Sandbergpython: Fix issue when Self proxy resolves to a another... tree | commitdiff
2019-03-01 Andrea Mondellimem-cache: alias to mem::getMasterPort in TLB class tree | commitdiff
2019-03-01 Giacomo Travaglinidev-arm: Set ICV_PMR_EL1-ICH_VMCR_EL2 mapping on reads tree | commitdiff
2019-03-01 Giacomo Travaglinidev-arm: Set ICV_IGRPEN<n>_EL1-ICH_VMCR_EL2 mapping... tree | commitdiff
2019-03-01 Ciro Santilliarch-arm: implement floating point aarch32 VCVTA family tree | commitdiff
2019-02-28 Gabe Blacksystemc: Move systemc disabling checks to SConsopts. tree | commitdiff
2019-02-28 Srikant Bharadwajruby: Fix garnet's round robin arbitration for vc selection tree | commitdiff
2019-02-28 Ivan Pizarromem-cache: Sandbox Based Optimal Offset Implementation tree | commitdiff
2019-02-27 Andrea Mondellimisc: Segmentation Fault during O3PipeView execution tree | commitdiff
2019-02-26 Srikant Bharadwajcpu: Fix indirect branch history updates tree | commitdiff
2019-02-26 Nikos Nikolerismem-cache: Copy over flags to forwarded response tree | commitdiff
2019-02-26 Andreas Sandbergscons: Marshal Python sources using the same Python... tree | commitdiff
2019-02-25 Gabe Blacksystemc: Remove _m5.systemc passthroughs from SystemC_K... tree | commitdiff
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