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misc: added missing override specifier
[gem5.git] / src /
2019-02-05 Andrea Mondellimisc: added missing override specifier tree | commitdiff
2019-02-05 Javier Buenocpu: Made the Loop Predictor a SimObject tree | commitdiff
2019-02-05 Jairo Balartcpu: Made TAGE a SimObject that can be used by other... tree | commitdiff
2019-02-05 Austin Harrisriscv: Get rid of ISA specific register types in Interr... tree | commitdiff
2019-02-01 Javier Buenomem-cache: Updated version of the Signature Path Prefetcher tree | commitdiff
2019-02-01 Anouk Van Laerdev, arm: Removed contextId variable tree | commitdiff
2019-02-01 Gabe Blackcpu, arch: Replace the CCReg type with RegVal. tree | commitdiff
2019-01-31 Andreas Sandbergpython: Remove getCode() type workaround tree | commitdiff
2019-01-31 Andreas Sandbergsim: Prepare C++ side for Python 3 tree | commitdiff
2019-01-31 Gabe Blackpower: Get rid of some ISA specific register types. tree | commitdiff
2019-01-31 Gabe Blacknull: Get rid of some register type definitions. tree | commitdiff
2019-01-31 Gabe Blackmips: Stop using architecture specific register types. tree | commitdiff
2019-01-31 Gabe Blackalpha: Stop using architecture specific register types. tree | commitdiff
2019-01-31 Gabe Blackx86: Stop using/defining some ISA specific register... tree | commitdiff
2019-01-31 Gabe Blackriscv: Get rid of some ISA specific register types. tree | commitdiff
2019-01-31 Gabe Blackarch: cpu: Rename *FloatRegBits* to *FloatReg*. tree | commitdiff
2019-01-30 Giacomo Gabrielliarch,cpu: Add vector predicate registers tree | commitdiff
2019-01-30 Giacomo Travagliniarch-arm, configs: Create single instance of DTB autoge... tree | commitdiff
2019-01-25 Giacomo Travagliniarch-arm: Remove floatReg operand type tree | commitdiff
2019-01-25 Giacomo Travagliniarch-arm: Use VecElem instead of FloatReg for FP instru... tree | commitdiff
2019-01-25 Giacomo Travagliniarch: Fix VecElem Operand generation in ISA parser tree | commitdiff
2019-01-25 Giacomo Travaglinicpu, arch, arch-arm: Wire unused VecElem code in the... tree | commitdiff
2019-01-25 Giacomo Travaglinicpu: O3 rename using the flatIndex instead of index tree | commitdiff
2019-01-25 Giacomo Travagliniarch-arm: Inital vector rename mode depending on A32/A64 tree | commitdiff
2019-01-25 Giacomo Travaglinicpu: Fix VecElemClass bugs in cpu models tree | commitdiff
2019-01-25 Giacomo Travaglinicpu: Add VecElem entries in MinorCPU Scoreboard tree | commitdiff
2019-01-25 Giacomo Travagliniarch-arm: Remove unused float operands tree | commitdiff
2019-01-25 Giacomo Travagliniarch: Provide traceback when parsing ISA code tree | commitdiff
2019-01-25 Nicholas Lindsaypython: Always throw TypeError on slave-slave connections tree | commitdiff
2019-01-24 Gabe Blackhsail: Remove the MiscReg type. tree | commitdiff
2019-01-24 Gabe Blackbase: arch: Get rid of the now unused FloatRegVal type. tree | commitdiff
2019-01-24 Ciro Santillidev-arm: fix --generate-dtb for ARM tree | commitdiff
2019-01-24 Rekai Gonzalez-Alb... cpu-o3: O3 LSQ Generalisation tree | commitdiff
2019-01-23 Giacomo Travagliniarch-arm: Implement LoadAcquire/StoreRelease in AArch32 tree | commitdiff
2019-01-23 Giacomo Travagliniarch-arm: IsStoreConditional flag set depending on... tree | commitdiff
2019-01-23 Giacomo Travagliniarch-arm: Remove SWP and SWPB instructions tree | commitdiff
2019-01-23 Gabe Blacksystemc: Fix TLM related includes. tree | commitdiff
2019-01-23 Gabe Blackarm: Replace MiscReg with RegVal in utility.(hh|cc). tree | commitdiff
2019-01-23 Zicong Wangmem-ruby: Fix missing TBE allocation and deallocation tree | commitdiff
2019-01-22 Gabe Blacksparc: Get rid of some register type definitions. tree | commitdiff
2019-01-22 Gabe Blackarch: cpu: Stop passing around misc registers by reference. tree | commitdiff
2019-01-22 Gabe Blackarm: Get rid of some register type definitions. tree | commitdiff
2019-01-22 Gabe Blackarm: dev: Replace ArmISA::MiscReg with RegVal in the... tree | commitdiff
2019-01-22 Ciro Santilliarch-arm: implement the GDB XML target description... tree | commitdiff
2019-01-22 Ciro Santilliscons: add helpers to access GDB XML description files tree | commitdiff
2019-01-22 Ciro Santilliscons: allow embedding arbitrary blobs into the gem5... tree | commitdiff
2019-01-22 Ciro Santillibase: add support for GDB's XML architecture definition tree | commitdiff
2019-01-22 Giacomo Travagliniarch-arm: Move AArch32 IMPLEMENTATION DEFINED registers tree | commitdiff
2019-01-22 Sascha Bischoffmem: Add tryTiming suppport to CommMonitor tree | commitdiff
2019-01-22 Brandon Pottersim-se add readv and modifies writev tree | commitdiff
2019-01-22 Brandon Pottersim-se: add ability to get/set sock metadata tree | commitdiff
2019-01-22 Brandon Pottersim-se: add syscalls related to polling tree | commitdiff
2019-01-22 Brandon Pottersim-se: add calls for network transmissions tree | commitdiff
2019-01-22 Brandon Pottersim-se: add socket-based functionality tree | commitdiff
2019-01-18 Daniel R. Carvalhobase: Fix unitialized storage tree | commitdiff
2019-01-17 Nikos Nikolerismem: Allow inserts in the begining of a packet queue tree | commitdiff
2019-01-17 Nikos Nikolerismem: Determine if a packet queue forces ordering at... tree | commitdiff
2019-01-17 Nikos Nikoleriscpu-o3: Make the smtCommitPolicy a Param.ScopedEnum tree | commitdiff
2019-01-17 Nikos Nikoleriscpu-o3: Make the smtROBPolicy a Param.ScopedEnum tree | commitdiff
2019-01-17 Nikos Nikoleriscpu-o3: Make the smtIQPolicy a Param.ScopedEnum tree | commitdiff
2019-01-17 Nikos Nikoleriscpu-o3: Make the smtLSQPolicy a Param.ScopedEnum tree | commitdiff
2019-01-17 Nikos Nikoleriscpu-o3: Make the smtFetchPolicy a Param.ScopedEnum tree | commitdiff
2019-01-17 Nikos Nikolerispython: Add support for scoped enums tree | commitdiff
2019-01-16 Gabe Blackcpu: dev: sim: gpu-compute: Banish some ISA specific... tree | commitdiff
2019-01-16 Gabe Blackarch: Make the ISA register types aliases for the globa... tree | commitdiff
2019-01-16 Gabe Blackarm: Make the fp register types 64 bits. tree | commitdiff
2019-01-16 Javier Buenomem-cache: Access Map Pattern Matching Prefetcher tree | commitdiff
2019-01-16 Javier Buenomem-cache: Signature Path Prefetcher tree | commitdiff
2019-01-16 Javier Buenomem-cache: allow prefetchers to emit page crossing... tree | commitdiff
2019-01-16 Javier Buenomem-cache: virtual address support for prefetchers tree | commitdiff
2019-01-16 Giacomo Travagliniarch-arm: Read VMPIDR instead of MPIDR when EL2 is... tree | commitdiff
2019-01-16 Anouk Van Laerarch-arm: Added TLBI_ALL EL2 instruction tree | commitdiff
2019-01-16 Alec Roelkearch-riscv: Add interrupt handling tree | commitdiff
2019-01-16 Alec Roelkearch-riscv: Fix reset function and style tree | commitdiff
2019-01-15 Giacomo Travaglinicpu: Fix usage of setArchVecElem tree | commitdiff
2019-01-15 Giacomo Travagliniarch-arm: Fix usage of RegId constructor for VecElem tree | commitdiff
2019-01-14 Gabe Blackarm: Stop using the FloatReg and FloatRegBits types. tree | commitdiff
2019-01-14 Gabe Blackconfig: De-nest the code in Port.splice(). tree | commitdiff
2019-01-14 Gabe Blackconfig: Fix an error message in Port.splice(). tree | commitdiff
2019-01-11 Andrea Mondellimisc: updated shabang for python script tree | commitdiff
2019-01-10 Javier Setoainsim-se, arch-arm: Add support for getdents64 tree | commitdiff
2019-01-10 Andreas Sandbergarch-arm, sim-se: Add support for TLS in clone tree | commitdiff
2019-01-10 Andreas Sandbergarch-arm, sim-se: Fix incorrect SP handling in clone tree | commitdiff
2019-01-10 Andreas Sandbergsim-se: Refactor clone to avoid most ifdefs tree | commitdiff
2019-01-10 Andreas Sandbergsim-se: Correctly calculate next PC in clone tree | commitdiff
2019-01-10 Andreas Sandbergsim-se: Use CONFIG_CLONE_BACKWARDS for Arm tree | commitdiff
2019-01-10 Javier Setoainarch-arm, sim-se: Wire up syscalls needed for pthreads tree | commitdiff
2019-01-10 Jairo Balartdev-arm: Add a VExpress_GEM5_V2 platform with GICv3... tree | commitdiff
2019-01-10 Jairo Balartdev-arm: Add a GICv3 model tree | commitdiff
2019-01-10 Giacomo Travaglinibase: Make it possible to convert strings to enums tree | commitdiff
2019-01-10 Gabe Blacksystemc: Fix a function which was broken during style... tree | commitdiff
2019-01-09 Ivan Pizarroarch-arm: Additional bits in misc ARM registers to... tree | commitdiff
2019-01-09 Gabe Blacksystemc: Make input.txt a dependency for the tlm/endian... tree | commitdiff
2019-01-09 Gabe Blacksystemc: Exclude some failing systemc TLM tests in... tree | commitdiff
2019-01-09 Gabe Blacksystemc: Remove the TLM dependence on a non-standard... tree | commitdiff
2019-01-09 Gabe Blacksystemc: Stop using the sc_string_view type. tree | commitdiff
2019-01-09 Gabe Blacksystemc: Replace sc_core::sc_type_index with std::type_... tree | commitdiff
2019-01-09 Gabe Blacksystemc: Stop using the Accellera specific "none" globa... tree | commitdiff
2019-01-09 Gabe Blacksystemc: Rename tlm_core header files to have a .hh... tree | commitdiff
2019-01-09 Gabe Blacksystemc: Add a dummy argv[0] when running the tests. tree | commitdiff
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