X86: Implement the bswap instruction.
[gem5.git] / src /
2009-01-26 Gabe BlackX86: Implement the bswap instruction.
2009-01-26 Gabe BlackDev: Make the RTC device ignore writes to a read only...
2009-01-26 Gabe BlackX86: Fix a bug in the iret microcode.
2009-01-26 Gabe BlackX86: Make the interrupt object wake up the CPU when...
2009-01-26 Gabe BlackCPU: Add a setCPU function to the interrupt objects.
2009-01-26 Gabe BlackDevices: Make the destructor virtual on the CopyEnginCh...
2009-01-24 Nathan Binkertpseudo inst: Add new wake cpu instruction for sending...
2009-01-24 Nathan Binkertcpu: provide a wakeup mechanism that can be used to...
2009-01-23 Ali SaidiTrace: Add DPRINTFS macro that takes parameter to call...
2009-01-23 Ali SaidiIGbE: Fix two e1000 driver bugs that I missed before.
2009-01-21 Nathan Binkerto3cpu: give a name to the activity recorder for better...
2009-01-20 Nathan Binkertthread_context: move getSystemPtr so SE mode can get...
2009-01-19 Nathan Binkertpython: add fatal() function to the m5 package and...
2009-01-19 Nathan Binkertpython: Try to isolate the stuff that's in the m5.inter...
2009-01-19 Nathan Binkerttracing: Add help strings for some of the trace flags
2009-01-19 Nathan Binkerttracing: panic() if people try to use tracing, but...
2009-01-19 Nathan Binkertpython: Rework how things are imported
2009-01-19 Nathan Binkertscons: Don't add all objects to the library twice
2009-01-17 Ali SaidiFix issue 326: glibc non-deterministic because it reads...
2009-01-17 Ali SaidiCopyEngine: Implement a I/OAT-like copy engine.
2009-01-13 Nathan BinkertSCons: centralize the Dir() workaround for newer versio...
2009-01-12 Richard StrongThis fix addresses an ill formed if statement that...
2009-01-07 Gabe BlackX86: Hook in the M5 pseudo insts.
2009-01-07 Gabe BlackX86: Autogenerate macroop generateDisassemble function.
2009-01-07 Gabe BlackX86: Move the function that prints memory args into...
2009-01-07 Gabe BlackX86: Move the macroop class out of the isa description...
2009-01-07 Gabe BlackX86: Change indentation on microop disassembly.
2009-01-07 Gabe BlackTracing: Make tracing aware of macro and micro ops.
2009-01-06 Ali SaidiIGbE: Implement header splitting with large MTU
2009-01-06 Ali SaidiINET: Add functions to header types to get offset in...
2009-01-06 Ali SaidiIGbE: Remove is8257 variable
2008-12-17 Steve ReinhardtMake Alpha pseudo-insts available from SE mode.
2008-12-17 Gabe BlackSPARC: Truncate syscall args and return values appropri...
2008-12-15 Gabe BlackPCI: Add some missing breaks to a couple case statements.
2008-12-15 Author NameThe ide_ctrl serialize and unserialize were broken.
2008-12-09 Richard StrongIDE: Fix serialization for the IDE controller.
2008-12-08 Nathan Binkerteventq: Add some debugging code to the eventq.
2008-12-08 Nathan Binkertoutput: Change default output directory and files and...
2008-12-07 Gabe BlackDevices: Clean up the IDE controller.
2008-12-07 Lisa Hsuimported patch aux-fix.patch
2008-12-06 Gabe BlackX86: Add add_entry back in.
2008-12-06 Nathan Binkerteventq: use the flags data structure
2008-12-06 Nathan Binkerteventq: move virtual function definitiions to the ...
2008-12-06 Nathan Binkerttraceflags: Make "All" a valid trace flag.
2008-12-06 Nathan BinkertSimObject: change naming of vectors so there are the...
2008-12-06 Nathan Binkertflags: Change naming of functions to be clearer
2008-12-05 Ali SaidiIGbE: Add support for newer 8257x based Intel NICs
2008-12-05 Ali SaidiIGbE: Add support for TCP segment offload
2008-12-05 Ali SaidiINet: Allow updating on id, len, seq, and flag field...
2008-12-05 Lisa HsuAutomated merge with ssh://m5sim.org//repo/m5
2008-12-05 Lisa HsuThis brings M5 closer to modernity - the kernel being...
2008-12-04 Lisa HsuThis patch pulls out the auxiliary vector struct from...
2008-12-03 Nathan Binkertcprintf: support a configurable width and precision...
2008-11-21 Steve ReinhardtAssume files w/o obvious OS are Linux (with warning)
2008-11-17 Steve ReinhardtSort trace flags before printing them.
2008-11-16 Clint SmullenOutput: Include gzstream package to allow automatically...
2008-11-15 Steve Reinhardtsyscalls: fix latent brk/obreak bug.
2008-11-14 Steve ReinhardtCache: get rid of obsolete Tag methods.
2008-11-14 Nathan BinkertFix a bunch of bugs I introduced when I changed the...
2008-11-14 Gabe BlackCPU: Refactor read/write in the simple timing CPU.
2008-11-10 Nathan BinkertSCons: Allow top level directory of EXTRAS able to...
2008-11-10 Nathan Binkertpseudo inst: Add rpns (read processor nanoseconds)...
2008-11-10 Nathan BinkertClean up the SimpleTimingPort class a little bit.
2008-11-10 Nathan Binkertclean: Move some stuff from the hh file to the cc file.
2008-11-10 Nathan Binkertpython: Fix the reference counting for python events...
2008-11-10 Clint SmullenO3CPU: Make the instcount debugging stuff per-cpu.
2008-11-10 Nathan Binkertmem: update stuff for changes to Packet and Request
2008-11-10 Nathan Binkertstyle: clean up the Packet stuff
2008-11-10 Nathan Binkertflags: Provide an object for managing boolean flags...
2008-11-10 Nathan Binkertsafe_cast: add a new cast function for casts that shoul...
2008-11-10 Steve ReinhardtDmaDevice: fix minor type in error message.
2008-11-10 Steve Reinhardtmem: Assert that requests have non-negative size.
2008-11-10 Steve ReinhardtCache: Refactor packet forwarding a bit.
2008-11-10 Gabe BlackCPU: Make unaligned accesses work in the timing simple...
2008-11-10 Gabe BlackX86: Fix completeAcc get call.
2008-11-10 Gabe BlackX86: Make the timing simple CPU handle variable length...
2008-11-06 Lisa HsuAutomated merge with ssh://daystrom.m5sim.org//repo/m5
2008-11-05 Lisa HsuAutomated merge with ssh://m5sim.org//repo/m5
2008-11-05 Lisa HsuFix SPARC_FS compile
2008-11-05 Lisa HsuRight now a single thread cpu 1 could get assigned...
2008-11-05 Nathan BinkertFix a few more places where the context stuff wasn...
2008-11-04 Lisa Hsudecouple eviction from insertion in the cache.
2008-11-04 Lisa HsuChange the findBlock(addr, lat) to accessBlock, which...
2008-11-04 Lisa Hsuget rid of all instances of readTid() and getThreadNum...
2008-11-03 Lisa HsuAdd in Context IDs to the simulator. From now on,...
2008-11-03 Lisa HsuMake it so that all thread contexts are registered...
2008-11-03 Lisa Hsumake BaseCPU the provider of _cpuId, and cpuId() instea...
2008-10-27 Clint SmullenCPU: The API change to EventWrapper did not get propag...
2008-10-27 Clint SmullenCheckpointing: createCountedDrain function, it was...
2008-10-23 Lisa Hsus/cpu_id/cpuId in o3 (to be consistent and match style...
2008-10-23 Lisa Hsuprobe function no longer used anywhere.
2008-10-23 Lisa Hsuremove the totally obsolete split cache
2008-10-21 Nathan Binkertstyle: Use the correct m5 style for things relating...
2008-10-20 Ali SaidiO3CPU: Undo Gabe's changes to remove hwrei and simpalch...
2008-10-20 Lisa HsuAutomated merge with ssh://daystrom.m5sim.org//z/repo/m5
2008-10-17 Nathan Binkertneed to add packet_access.hh in order to get tempalte...
2008-10-17 Nathan Binkertget rid of local variable that's only used in an assert...
2008-10-16 Lisa HsuAutomated merge with ssh://daystrom.m5sim.org//z/repo/m5
2008-10-14 Lisa HsuThis function declaration isn't used anywhere.
2008-10-14 Nathan Binkerteventq: make python events actually work
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