mem: Refactor port proxies to support secure accesses
[gem5.git] / src /
2018-02-19 Andreas Sandbergmem: Refactor port proxies to support secure accesses
2018-02-19 Andreas Sandbergarch-arm: Add aarch64 semihosting support
2018-02-16 Giacomo Travagliniarch-arm: IMPLEMENTATION DEFINED register
2018-02-16 Giacomo Travagliniarch-arm: Arch regs and pseudo regs distinction
2018-02-16 Chuan Zhuarch-arm: Fix syntax error in TLB::getResultTe
2018-02-16 Chuan Zhuarch-arm: Fix big endian support in {Load,Store}Double64
2018-02-16 Chuan Zhuarch-arm: Fix big endian support in do{Long,L1,L2}Descr...
2018-02-16 Andreas Sandbergarch-arm: Add support for automatic reset addr selection
2018-02-16 Giacomo Travagliniarch-arm: Change ArmFault cast from reinterpret to...
2018-02-16 Andreas Sandbergarch-arm: Decode Brk64 instructions
2018-02-16 Andreas Sandbergmem: Add PortProxy read/write helper with explicit...
2018-02-16 Chuan Zhusim: Add gtoh/htog helpers that take an explicit endianness
2018-02-16 Chuan Zhuarch-arm: Fix Secure state check in checkFPAdvSIMDTrap64
2018-02-14 Rico Amslingermem, sim-se: Fixed seg-fault in EmulationPageTable...
2018-02-13 Andreas Sandbergdev: Remove unused interrupt controller in Terminal
2018-02-13 Rekai Gonzalez-Alb... sim: Make Stats truly non-copy-constructible
2018-02-09 Wendy ElsasserFix DDR4_2400_8x8 DRAMCTRL configuration
2018-02-09 Giacomo Travaglinisim: Remove _numContexts member in System class
2018-02-09 Jason Lowe-Powerdev: Fix i8042 device errors
2018-02-08 Daniel R. Carvalhomem-cache: Make cache warmup percentage a parameter.
2018-02-08 Giacomo Travagliniarch-arm: Correct SecureMonitorTrap vals for aarch32
2018-02-08 Chuan Zhuarch-arm: Fixed error in choosing vector offset
2018-02-08 Giacomo Travagliniarch-arm: Don't change PSTATE in Illegal Exception...
2018-02-08 Chuan Zhuarch-arm: Handle route to EL2 in Supervisor Trap
2018-02-07 Nikos Nikolerisarch-arm: Change the type of fault for dc ivac instructions
2018-02-07 Nikos Nikolerisarch-arm: Unify permission checks for dc * instructions
2018-02-07 Nikos Nikolerisarch-arm: Check cache maintenance insts for permission...
2018-02-07 Nikos Nikolerisarch-arm: Turn dc ivac to dc civac when some conditions...
2018-02-07 Nikos Nikolerisarch-arm: Fix printing of the data cache maintenance...
2018-02-07 Nikos Nikolerisarch-arm: Fix cache line size for cache maintenace...
2018-02-07 Nikos Nikolerisarch-arm: Fault when dc ivac is executed from EL0
2018-02-07 Nikos Nikolerismem-cache: Only pendingModified MSHRs can satisfy CMO...
2018-02-07 Nikos Nikolerismem-cache: Cleaned blocks should be marked as not writable
2018-02-07 Giacomo Travagliniarch-arm: Change function name for banked miscregs
2018-02-07 Giacomo Travagliniarch-arm: Fix AArch32 SETEND Instruction
2018-02-07 Giacomo Travagliniarch-arm: Correct Illegal Exception Return detection
2018-02-07 Giacomo Travagliniarch-arm: ELUsingAArch32K from armarm pseudocode
2018-02-07 Giacomo Travagliniarch-arm: isSecureBelow from armarm pseudocode
2018-02-07 Chuan Zhuarch-arm: Fix incorrect assumptions in ELIs64
2018-02-06 Daniel R. Carvalhomem-cache: Remove extra numSets zero check.
2018-02-06 Daniel R. Carvalhomem: Standardize mem folder header guards
2018-02-05 Gabe Blackbase: Update #includes for bitunion.hh.
2018-02-05 Giacomo Travaglinicpu: MinorCPU handling IsSquashAfter flag
2018-02-05 Giacomo Travagliniarch-arm: Removing Serializing flag from ISB
2018-02-02 Nikos Nikolerisbase: Fix unused function warning
2018-02-01 Sujay Phadkealpha: fix for no 'break' in the case statement
2018-01-31 Christian Menardarch-x86: consistent style of comments in system files
2018-01-30 Maximilian Steinarch-x86: Granularity bit and segment limit
2018-01-29 Gabe Blackriscv: Add overrides to various StaticInst methods.
2018-01-29 Gabe Blackbase: Remove the ability to cprintf stringstreams directly.
2018-01-29 Gabe Blackbase: Delete commented out versions of the format_integ...
2018-01-29 Curtis Dunhamarch-arm: understandably initialize register permissions
2018-01-29 Curtis Dunhamarm: extend MiscReg metadata structures
2018-01-29 Curtis Dunhamarch-arm: understandably initialize register mappings
2018-01-29 Glenn Bergmansarm: DT autogeneration - generate PCI node
2018-01-29 Glenn Bergmansarm: DT autogeneration - Generate energy controller...
2018-01-29 Glenn Bergmansarm: DT autogeneration - autogenerate RealView Platform...
2018-01-29 Glenn Bergmansarm: DT autogeneration - Generate memory node
2018-01-29 Glenn Bergmansarm: DT autogeneration - Generate cpus node
2018-01-29 Glenn Bergmansarm: DT autogeneration - Device Tree generation methods
2018-01-29 Glenn Bergmansext: DT autogeneration - Add PyFtd to m5 space
2018-01-29 Curtis Dunhamarm: make Arm GenericTimer a ClockedObject
2018-01-27 Gabe Blackbase: Add an "override" to name() in the HardBreakpoint...
2018-01-27 Gabe Blackbase: Get bitunions to compile on clang 3.8.
2018-01-23 Swapnil Hariaarch-x86: Adding clflush, clflushopt, clwb instructions
2018-01-23 Gabe Blackarch: Remove the "arch/tlb.hh" switching header.
2018-01-23 Gabe Blacktarch, mem: Abstract the data stored in the SE page...
2018-01-23 Gabe Blackx86, mem: Rewrite the multilevel page table class.
2018-01-20 Gabe Blackx86, mem: Don't try to force physical addresses on...
2018-01-20 Gabe Blackx86, mem: Get rid of PageTableOps::getBasePtr.
2018-01-20 Gabe Blackx86, mem: Pass the multi level page table layout in...
2018-01-20 Gabe Blackarch, mem: Make the page table lookup function return...
2018-01-20 Gabe Blackbase: Hide the BitUnion::__StorageType type.
2018-01-20 Gabe Blackarm, base: Generalize and move the BitUnion hash struct.
2018-01-20 Gabe Blacksim: Use the new BitUnion templates in serialize.hh.
2018-01-20 Gabe Blackbase: Enable specializing templates on BitUnion types.
2018-01-20 Gabe Blackbase: Rework bitunions so they can be more flexible.
2018-01-20 Gabe Blacksim, arch, base: Refactor the base remote GDB class.
2018-01-19 Gabe Blackarch, mem, sim: Consolidate and rename the SE mode...
2018-01-17 Gabe Blackmem: Change the multilevel page table to inherit from...
2018-01-16 Alec Roelkearch-riscv: Fix floating-poing op classes
2018-01-16 Alec Roelkearch-riscv: Fix floating-point conversion bugs
2018-01-16 Gabe Blacksim: Simplify registerThreadContext a little bit.
2018-01-15 Gabe Blackmem: Track TLB entries in the lookup cache as pointers.
2018-01-15 Gabe Blackarch: Fix a fatal_if in most of the arch's process...
2018-01-12 Xiaoyu Masim: Allow passing a user-defined L2XBar to addTwoLevel...
2018-01-11 Alec Roelkearch-riscv: Don't crash when printing unknown CSRs
2018-01-11 Nikos Nikolerismem-ruby: Fix wakeup timeouts for the MOESI_CMP_token...
2018-01-11 Nikos Nikolerismem-ruby: Remove function that maps responses to a...
2018-01-11 Nikos Nikolerismem-ruby: Add support for multiple DMA engines in MESI_...
2018-01-11 Gabe Blackcpu: Make the CPU's TLB parameter a BaseTLB.
2018-01-11 Gabe Blackarm, power: Make the python TLB simobjects inherit...
2018-01-11 Gabe Blackarch,mem: Remove the default value for page size.
2018-01-11 Gabe Blackarch,mem: Move page table construction into the arch...
2018-01-10 BKPstyle: change C/C++ source permissions to noexec
2018-01-10 Alec Roelkearch-riscv: Make use of ImmOp's polymorphism
2018-01-10 Gabe Blackalpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of...
2018-01-10 Tuan Taarch-riscv,sim: Support clone syscall in RISC-V
2018-01-09 Nikos Nikolerismem-cache: Prune unnecessary writebacks in exclusive...
2018-01-09 Gabe Blackcpu: Use the NotAnInst flag to avoid passing an inst...
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