2020-07-26 |
Luke Kenneth Casso... | convert logical test case to new base class accumulator... |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | move run_test_program to base class and rename to ... |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | convert ALU to new accumulator style |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | again, move large heavily-indented code-block in div... |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | run subtest, indentation getting too large, move to... |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | get div compunit test running (use new way to accumulat... |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | use new test accumulator class in div tests |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | add common test base class for "accumulating" tests... |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | remove old div overflow test, keep microwatt version |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | hilarious. only just caught a bug where overflow was... |
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2020-07-25 |
Luke Kenneth Casso... | comb += missing |
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2020-07-25 |
Luke Kenneth Casso... | add CR0 regression, expected 0b10 actual 0b11 |
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2020-07-25 |
Luke Kenneth Casso... | add regression test 8, DivPipeCore producing spurious... |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | add pia back in |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | re-add pia_result_to_output function (minus "typing... |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | add div compunit test |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | wait until pipeline indicates that its output is valid... |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | move reset of rdmaskn to after "busy" |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | comment LDST FunctionUnit |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | going on a bit of a "naming" spree, this for Jean-Paul... |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | add spec page numbers to logical ops |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | add page-number comments to ALU main_stage |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | update comment-headers (TODO include page numbers to... |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | make trap proof section more readable |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | Properties for MFMSR |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | Reorganize code layout |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | WIP: SC properties more closely match doc'd behavior |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | WIP: addressing code review, restoring proofs, etc. |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | got fed up with bit-slice ordering crap. cut it out |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | add better comments on field_slice |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | returned field_slice to original, and added comments |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | annoying, yet more typos |
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2020-07-24 |
Luke Kenneth Casso... | annoying, typo |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | better debug assert log message |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | too much debug info going past, so add the test registe... |
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2020-07-24 |
Luke Kenneth Casso... | missed import |
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2020-07-24 |
Luke Kenneth Casso... | calling the test dictionary from the constructor is... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | whoops spelling |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | add the div pipe kind plus prog.assembly to the assert... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | call test_write_ilang only once - ends up being called... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | fix how long div tests run, de-comment FSM and DivPipeCore |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | argh! work-in-progress breaking / fixing how to do... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | whoops must add DivTestCasesLong to get it to produce... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | remove bad hack calling trunc_divs/trunc_mods |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | re-enable commented-out div unit tests |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | split out "all" div into separate unit test (takes... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | reduce variable size, continuation not needed |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | comment about timeline does not exist |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | ah ha! not using "with" was not calling the "close... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | read into a BytesIO to avoid "too many open files" |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | whitespace / comments |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | restore modification to caller.py from reversion of... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | Revert "working on div's test_pipe_caller" |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | bug found in pseudocode reader when assembly code has... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | code review comments for trap and proof |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | made it clear what is meant by the slice numbering... |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | Refactorin of common code |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | Address code review comments |
tree | commitdiff |
2020-07-24 |
Jacob Lifshay | working on div's test_pipe_caller |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | syntax error |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | support 32-bit mem width setting |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | try SDRAM SDR |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | allow imem to be 64/32 bit wide |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | begin core in running state |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | try different MEMTEST_xxx sizes with 64 bit bus width |
tree | commitdiff |
2020-07-23 |
Jacob Lifshay | add all div* and mod* instructions to test_pipe_caller |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | working on fsm |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | Merge remote-tracking branch 'origin/master' |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | format code |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | re-add CRG (clock reset generator) |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | missing ports from issuer, when doing verilog |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | add clock domain using snippet taken from random file |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | cleanup in litex core.py |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | update comments |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | add dummy irq set/get |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | add boot-helper.S etc from microwatt litex core |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | set additional MSR bits according to v3.0B spec when... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | use (new) MSRb and PIb which has auto-bigendian numbers |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | sigh, auto-create some little/big-endian classes for... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | missed import of Builder, set cpu_type to "None" tempor... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | begin converting litex sim to libre-soc |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | whoops forgot field accessor |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | do not use wildcard import |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | start from vexriscv sim.py from |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | correct syntax error |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | first version of litex core (to be submitted upstream... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | whoops typo, 63-start not 3-start (doh) |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | field number ordering wrong way round? |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | syntax error |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | review trap main_stage.py modifications: we are not... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | comments, add page spec numbers for branch ops into... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | add comment headings with spec page numbers |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | comment on op.insn ordering |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | code-shuffle, add comments |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | add TT.size and use it in PowerDecoder and trap input... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | inline comments in trap proof |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | note that traptype MUST increase in bitwidth correspond... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | fix branch main_stage proof, add ctr 32-bit, fix BCREG |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | rework branch proof to use br_input_record |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | update README for pipe_data.py |
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