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match up dram initialisation parameters
[ls2.git] / src /
2022-02-19 Luke Kenneth Casso... match up dram initialisation parameters tree | commitdiff
2022-02-19 Luke Kenneth Casso... hm -abc9 seems to be working, and without -nowidelut tree | commitdiff
2022-02-18 Luke Kenneth Casso... add DRAM class to DDR3Soc tree | commitdiff
2022-02-18 Luke Kenneth Casso... add FPGA argument to DDR3SoC tree | commitdiff
2022-02-18 Luke Kenneth Casso... add microwatt console lib and #includes tree | commitdiff
2022-02-18 Luke Kenneth Casso... make cpu optional (test purposes), make bios optional, tree | commitdiff
2022-02-16 Luke Kenneth Casso... remove minerva cpu tree | commitdiff
2022-02-16 Luke Kenneth Casso... drop clock frequency to 25 mhz and disable abc9 (it... tree | commitdiff
2022-02-16 Luke Kenneth Casso... wildcards never ok. update comments tree | commitdiff
2022-02-16 Luke Kenneth Casso... add copyright notices tree | commitdiff
2022-02-16 Luke Kenneth Casso... update ECP5 PLL to accept parameters for setting arbitr... tree | commitdiff
2022-02-16 Luke Kenneth Casso... * add uart_pins to UART16550 peripheral so they get... tree | commitdiff
2022-02-16 Luke Kenneth Casso... * disable DDR3 for now tree | commitdiff
2022-02-15 Luke Kenneth Casso... connect up stall signals (fake) for WB Classic compliance tree | commitdiff
2022-02-15 Luke Kenneth Casso... alternative uart wishbone mapping which just takes... tree | commitdiff
2022-02-15 Luke Kenneth Casso... attempt to do 8-bit downconvert on wishbone bus for... tree | commitdiff
2022-02-15 Luke Kenneth Casso... correct syscon bus address to 0xC000_0000 tree | commitdiff
2022-02-15 Luke Kenneth Casso... add microwatt SYSCON peripheral at 0xc000_0000 tree | commitdiff
2022-02-15 Luke Kenneth Casso... increase size of bootmem tree | commitdiff
2022-02-15 Luke Kenneth Casso... add interrupt controller module, remove stall feature... tree | commitdiff
2022-02-14 Luke Kenneth Casso... add external cpu tree | commitdiff
2022-02-14 Luke Kenneth Casso... convert boot rom to bootmem and get first hello_world... tree | commitdiff
2022-02-14 Luke Kenneth Casso... add first cut of verilator simulation, over from microwatt tree | commitdiff
2022-02-14 Luke Kenneth Casso... add verilog build option, make DDR3 PHY optional, add... tree | commitdiff
2022-02-13 Luke Kenneth Casso... add future sim option (needs Simulated DDR PHY) tree | commitdiff
2022-02-13 Luke Kenneth Casso... rename examples to src tree | commitdiff