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arch-riscv,isa: Fix for compressed jump (c_j) imm
[gem5.git]
/
src
/
2019-05-03
Avishai Tvila
arch-riscv,isa: Fix for compressed jump (c_j) imm
tree
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commitdiff
2019-05-03
Giacomo Travaglini
dev: StreamID generation in DMA device
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Store a PhysProxy port in Gicv3Redist
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Add named variable for GICD_TYPER.IDBits
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Read correct version of ICC_BPR register
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Get a Gicv3Redistributor ptr from phys address
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Add several LPI methods in Gicv3Redistributor
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Take LPIs into account when interacting with...
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Fix GICv3 LPIs priority value
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Disable LPI Configuration Table caching
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Check EnableLPIs before checking for pending...
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: GICv3 LPI tables are using physical addresses
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Fix GICv3 LPI loop
tree
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commitdiff
2019-05-02
Giacomo Travaglini
dev-arm: Fix Bitwise operation in GICv3
tree
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commitdiff
2019-04-30
Gabe Black
arch: Stop using TheISA within the ISAs.
tree
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commitdiff
2019-04-30
Gabe Black
x86: Get rid of some unnecessary TheISA-es in x86.
tree
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commitdiff
2019-04-30
Gabe Black
sparc: Move translation constants from isa_traits.hh...
tree
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commitdiff
2019-04-30
Gabe Black
sparc: Move the interrupt types out of isa_traits.hh...
tree
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commitdiff
2019-04-30
Gabe Black
arch: Remove the mt.hh switching header.
tree
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commitdiff
2019-04-30
Gabe Black
cpu: alpha: Delete all occurrances of the simPalCheck...
tree
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commitdiff
2019-04-30
Gabe Black
alpha: Implement simPalCheck within the ISA description.
tree
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commitdiff
2019-04-30
Gabe Black
cpu: Remove hwrei from the generic interfaces.
tree
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commitdiff
2019-04-30
Alexandru Dutu
sim-se: use DPRINTF_SYSCALL for ioctl/wait4
tree
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commitdiff
2019-04-30
Brandon Potter
sim-se: bugfix for 54c77aa055e
tree
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commitdiff
2019-04-30
Gabe Black
arch: cpu: Track kernel stats using the base ISA agnost...
tree
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commitdiff
2019-04-30
Gabe Black
alpha: Implement HWREI in the ISA.
tree
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commitdiff
2019-04-30
Gabe Black
alpha: Add some control registers to the ISA operands...
tree
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commitdiff
2019-04-30
Brandon Potter
sim-se: add socket ioctls
tree
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commitdiff
2019-04-30
Gabe Black
systemc: Add a distinct async_request_update mechanism.
tree
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commitdiff
2019-04-29
Gabe Black
cpu: Get rid of the (read|set)RegOtherThread methods.
tree
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commitdiff
2019-04-29
Gabe Black
mips: Implement readRegOtherThread and setRegOtherThrea...
tree
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commitdiff
2019-04-29
Gabe Black
cpu: Include debug flags regardless of whether the...
tree
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commitdiff
2019-04-29
Steve Reinhardt
sim-se: create Proc out files in out dir
tree
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commitdiff
2019-04-29
Giacomo Travaglini
arch-arm: Faults DebugFlag now printing inst opcode...
tree
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commitdiff
2019-04-29
Giacomo Travaglini
arch-arm: Report real instruction encoding when Undefined
tree
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commitdiff
2019-04-28
Gabe Black
arch, sim: Simplify the AuxVector type.
tree
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commitdiff
2019-04-28
Gabe Black
mem: Remove the ISA specialized versions of port proxy...
tree
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commitdiff
2019-04-28
Gabe Black
mem: Minimize the use of MemObject.
tree
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commitdiff
2019-04-27
Gabe Black
python: Get rid of the VectorPort constructor.
tree
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commitdiff
2019-04-27
Gabe Black
python: Replace the Master/Slave Ports with Request...
tree
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commitdiff
2019-04-26
Giacomo Travaglini
arch-arm: updateMiscReg not setting isHyp in aarch64
tree
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commitdiff
2019-04-26
Gabe Black
arm: Factor some repetition out of the ProcessInfo...
tree
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commitdiff
2019-04-25
Gabe Black
arm: Fix some style issues in stacktrace.cc.
tree
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commitdiff
2019-04-25
Gabe Black
x86: Refactor the ProcessInfo constructor.
tree
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commitdiff
2019-04-25
Gabe Black
x86: Fix some style issues in stacktrace.cc.
tree
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commitdiff
2019-04-25
David Hashe
sim-se: add a faux-filesystem
tree
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commitdiff
2019-04-25
Giacomo Travaglini
arch-arm: Remove un-needed hyp flag in TLBI operations
tree
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commitdiff
2019-04-25
Giacomo Travaglini
arch-arm: Correct target EL field in TLBI operations
tree
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commitdiff
2019-04-25
Giacomo Travaglini
dev-arm: Move GICv3 (Re)Ditributor address in Realview.py
tree
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commitdiff
2019-04-25
Giacomo Travaglini
dev-arm: Limit number of max PE in GICv3 to 128
tree
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commitdiff
2019-04-25
Giacomo Travaglini
dev-arm: Add GICv4 extension switch in GICv3
tree
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commitdiff
2019-04-25
Giacomo Travaglini
dev-arm: Check for maximum number of supported PE in...
tree
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commitdiff
2019-04-24
Andrea Mondelli
cpu,mem: missing override specifier
tree
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commitdiff
2019-04-24
Gabe Black
systemc: Use the new TLM socket types in the TLM bridge...
tree
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commitdiff
2019-04-24
Gabe Black
systemc: Add Port types for initiator and target sockets.
tree
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commitdiff
2019-04-24
Gabe Black
dev: Use the new Port role mechanism to make an EtherIn...
tree
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commitdiff
2019-04-24
Gabe Black
python: Generalize the Port.splice function.
tree
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commitdiff
2019-04-24
Gabe Black
python: Generalize the dot_writer to handle non Master...
tree
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commitdiff
2019-04-24
Gabe Black
python: Make Port roles a more generic concept.
tree
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commitdiff
2019-04-23
Ciro Santilli
python: fix tracing after Python 3 refactor
tree
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commitdiff
2019-04-22
Alexandru Dutu
sim-se: Enhance clone for X86KvmCPU
tree
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commitdiff
2019-04-22
Daniel
mem-cache: Fix fix of replacement count
tree
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commitdiff
2019-04-22
Gabe Black
cpu: Eliminate the ProxyThreadContext class.
tree
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commitdiff
2019-04-19
Daniel R. Carvalho
mem-cache: Fix increasing replacement count
tree
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commitdiff
2019-04-19
Daniel R. Carvalho
mem-cache: Remove blk_addr from Queue::trySatisfyFunctional
tree
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commitdiff
2019-04-19
Daniel R. Carvalho
mem-cache: Add match functions to QueueEntry
tree
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commitdiff
2019-04-19
Daniel R. Carvalho
mem: Add packet matching functions
tree
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commitdiff
2019-04-19
Daniel R. Carvalho
mem-cache: Move Target to QueueEntry
tree
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commitdiff
2019-04-19
Daniel R. Carvalho
mem-cache: Assert Entry inherits from QueueEntry in...
tree
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commitdiff
2019-04-19
Daniel R. Carvalho
mem: Make DRAMCtrl::decodeAddr const
tree
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commitdiff
2019-04-19
Daniel R. Carvalho
mem: Allow packet to provide its own addr range
tree
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commitdiff
2019-04-16
Andrea Mondelli
mem: missing override specifier
tree
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commitdiff
2019-04-14
Gabe Black
mem: Teach SimpleMem to return a MemBackdoor when appro...
tree
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commitdiff
2019-04-14
Gabe Black
mem: Maintain a back door into the AbstractMem's backin...
tree
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commitdiff
2019-04-11
Anis Peysieux
mem-cache: Fix RRPV for RRIP
tree
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commitdiff
2019-04-11
Giacomo Travaglini
arch-arm: Enable PMSELR_EL0 read in PMU
tree
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commitdiff
2019-04-10
Gabe Black
mem: Plumb backdoor requests through the xbar classes.
tree
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commitdiff
2019-04-10
Gabe Black
systemc: Teach the TLM bridges how to use gem5's new...
tree
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commitdiff
2019-04-10
Gabe Black
mem: Add sendAtomicBackdoor/recvAtomicBackdoor port...
tree
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commitdiff
2019-04-10
Nikos Nikoleris
mem-cache: Fix MSHR handling of cache clean requests
tree
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commitdiff
2019-04-10
Giacomo Travaglini
cpu: O3 switchFreeList checking VecElems instead of...
tree
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commitdiff
2019-04-08
Jason Lowe-Power
learning_gem5: Fix vector port panic in SimpleCache
tree
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commitdiff
2019-04-06
Gabe Black
mem: Add a MemBackdoor type to track memory backdoors.
tree
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commitdiff
2019-04-05
Nikos Nikoleris
cpu: Correctly account for executed instructions in...
tree
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commitdiff
2019-04-05
Ryan Gambord
mem-cache: ambiguous use of abs function
tree
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commitdiff
2019-04-05
Jason Lowe-Power
mem: Reverse order of write/read mem queue check
tree
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commitdiff
2019-04-04
Javier Bueno
mem-cache: AMPM Prefetcher fails when restoring from...
tree
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commitdiff
2019-04-03
Andrea Mondelli
misc: Removed inconsistency in O3* debug msgs
tree
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commitdiff
2019-04-03
Andrea Mondelli
arch-mips: added missing override specifier (o3)
tree
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commitdiff
2019-04-03
Javier Bueno
mem-cache: Fix PIF prefetcher compilation error with...
tree
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commitdiff
2019-04-03
Javier Bueno
mem-cache: ISB prefetcher was triggering an assertion
tree
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commitdiff
2019-04-03
Javier Bueno
mem-cache: Fix panic in Indirect Memory prefetcher
tree
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commitdiff
2019-04-02
Giacomo Travaglini
dev-arm: Make GICv3 maintenance interrupt an ArmInterrupt
tree
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commitdiff
2019-04-02
Ivan Pizarro
mem-cache: Proactive Instruction Fetch Implementation
tree
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commitdiff
2019-04-01
Andrea Mondelli
dev-arm: Correct cast of template parameter
tree
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commitdiff
2019-03-29
Gabe Black
systemc: Templatize the gem5/TLM bridge SimObjects.
tree
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commitdiff
2019-03-29
Gabe Black
systemc: Delete extra code from src/systemc/tlm_bridge.
tree
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commitdiff
2019-03-29
Gabe Black
systemc: Create unified gem5/TLM bridge SimObjects.
tree
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commitdiff
2019-03-29
Gabe Black
tlm: Initial import of tlm/gem5 bridge code.
tree
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commitdiff
2019-03-29
Gabe Black
systemc: Provide a utility Port TLM socket wrapper...
tree
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commitdiff
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