2020-09-19 |
Luke Kenneth Casso... | shrink size of SRAM to 8k, move things around |
tree | commitdiff |
2020-09-19 |
Luke Kenneth Casso... | add (disabled) tri-state GPIO |
tree | commitdiff |
2020-09-19 |
Luke Kenneth Casso... | remove the gpio peripheral which was previously hard... |
tree | commitdiff |
2020-09-19 |
Luke Kenneth Casso... | add 3x EINTs to ls180soc |
tree | commitdiff |
2020-09-18 |
Luke Kenneth Casso... | add SPI, sdcard, preliminary GPIO to ls180 pinouts |
tree | commitdiff |
2020-09-18 |
Luke Kenneth Casso... | argh got fed up trying to shoe-horn into sim.py |
tree | commitdiff |
2020-09-18 |
Luke Kenneth Casso... | can remove unneeded overrides of Prev/Next Control |
tree | commitdiff |
2020-09-17 |
Jacob Lifshay | add divwe regression test case |
tree | commitdiff |
2020-09-17 |
Jacob Lifshay | re-enable test case -- no longer goes into an infinite... |
tree | commitdiff |
2020-09-17 |
Jacob Lifshay | fix bug #492 |
tree | commitdiff |
2020-09-17 |
Jacob Lifshay | replace sim._state.timeline.now with sim._engine.now |
tree | commitdiff |
2020-09-17 |
Luke Kenneth Casso... | add versa ecp5 fpga litex build script |
tree | commitdiff |
2020-09-16 |
Cole Poirier | complete first translation pass of dmi_dtm_xilinx.vhdl... |
tree | commitdiff |
2020-09-16 |
Luke Kenneth Casso... | make a start on LS180 platform |
tree | commitdiff |
2020-09-16 |
Cole Poirier | initial commit of JTAGToDMI debug interface translated... |
tree | commitdiff |
2020-09-16 |
Cole Poirier | add template file/starting point (copy of litex/boards... |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add back (totally confusing) accidentally-removed code... |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | instantiate MMU from AllFunctionUnits |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | do not need FAST regs in MMU |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | comment mmu test |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add edge-triggering to dcache/mmu "valid" |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add set MTSPR prtbl to mmu unit test |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add OP_MFSPR to mmu |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | use convenience vars |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add OP_TLBIE to mmu fsm |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add OP_DCBZ to mmu fsm, needs RA to be added to MMU... |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add MMU MTSPR connection into FSM |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add in MMU and DCache into MMU FSM |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | moved PLRU to nmutil |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add mmu fsm |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | remove more (confusing/spurious) types, should be in... |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | remove more (confusing/spurious) types, should be in... |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | remove more (confusing/spurious) types, should be in... |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | removed (confusing/spurious) types, should be in .pyi... |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add MMU FunctionUnit |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | mmu uses RB, go with it |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add OP_TLBIE |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add mmu initial pipe_data.py |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add extra "modes" to PortInterface |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | syntax error correction |
tree | commitdiff |
2020-09-15 |
Luke Kenneth Casso... | add inline comments into icache.py |
tree | commitdiff |
2020-09-14 |
Cole Poirier | icache.py add missing funciton bodies, add missing... |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | increase TLB_NUM_WAYS to 4 |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | vhdl conversion not really working for plru |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | add array signal names |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | rename plru input |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | rename plru input |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | reorg mmu lookup test so it is called twice |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | TLB PLRUs are of TLB_WAY_BITS width |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | fix mmu perms/lookup in dcache |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | whitespace |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | remove duplicated signal |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | comments on icache |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | get rid of rst |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | use word_select |
tree | commitdiff |
2020-09-14 |
Luke Kenneth Casso... | add mmu-dcache test |
tree | commitdiff |
2020-09-14 |
Cole Poirier | icache.py connect up all the sub-functions, fix typos... |
tree | commitdiff |
2020-09-14 |
Cole Poirier | icache.py add parameters to 'process' functions, fix... |
tree | commitdiff |
2020-09-13 |
Cole Poirier | icache.py move get/read/write functions out of ICache... |
tree | commitdiff |
2020-09-13 |
Cole Poirier | icache.py copy simulation code from dcache.py, fix... |
tree | commitdiff |
2020-09-13 |
Cole Poirier | icache.py fix syntax, move all constants and Array... |
tree | commitdiff |
2020-09-13 |
Cole Poirier | icache.py fix syntax errors that occured when running... |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | dcache truncate wishbone address, store real_addr in... |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | last mmu get seems ok |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | whoops recursion error v.shift calculated from v.shift |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | more experimenting with mmu READ_WAIT state |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | radix tree wait error, investigating |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | mmu test starting to make sense |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | floundering around with MMU unit test, no idea what... |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | mmu code-morph |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | code-morph, add masked function |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | move code to mmu_0 |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | add example radix walk from power-gem5 |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | MMU test |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | clarify |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | sort out ariane PLRU, rename/clarify |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | minor error in plru |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | rename cache_valid_bits to cache_validsg |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | cache_valid_idx too large in dcache |
tree | commitdiff |
2020-09-13 |
Luke Kenneth Casso... | whoops, cache valid array too small in dcache |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | more dcache debugging |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | missing reservation address comparison |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | dcache tidyup |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | more dcache debugging |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | add random dcache mem test |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | cache valid corrupted: fixed |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | adding names to array signals |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | whoops, indentation error |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | enable Display debugs |
tree | commitdiff |
2020-09-12 |
Luke Kenneth Casso... | set bytesel in dcache store |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | separat stbs_done into ld/st |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | dcache load/store test |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | debugging dcache |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | wrong width for data / addr |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | connect up WB SRAM to dcache test |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | start on dcache test |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | missing comb += |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | missing maybe_tlb_plrus |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | WAY_BITS not TLB_WAY_BITS |
tree | commitdiff |
2020-09-11 |
Luke Kenneth Casso... | whoops new node not to be calculated at end |
tree | commitdiff |
next |