synth_ice40: -abc2 to always use `abc` even if `-abc9`
[yosys.git] / techlibs / anlogic /
2020-01-06 Eddie HungMerge pull request #1617 from YosysHQ/eddie/abc9_dsp_re...
2020-01-06 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2020-01-03 N. EngelhardtMerge branch 'master' of https://github.com/YosysHQ...
2020-01-02 whitequarkMerge pull request #1604 from whitequark/unify-ram...
2020-01-02 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-01-02 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2020-01-02 Clifford WolfMerge pull request #1609 from YosysHQ/clifford/fix1596
2020-01-02 Eddie HungMerge pull request #1601 from YosysHQ/eddie/synth_retime
2020-01-01 Eddie HungMerge pull request #1606 from YosysHQ/eddie/improve_tests
2020-01-01 Eddie HungFix anlogic async flop mapping
2020-01-01 whitequarkHarmonize BRAM/LUTRAM descriptions across all of Yosys.
2019-12-30 Eddie HungUpdate doc that "-retime" calls abc with "-dff -D 1"
2019-12-30 Eddie HungRevert "Revert "synth_* with -retime option now calls...
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog...
2019-10-21 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ...
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/efinix
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/anlogic
2019-09-30 Eddie HungMerge branch 'SergeyDegtyar/ecp5' of https://github...
2019-09-27 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-09-27 Aman GoelMerge pull request #7 from YosysHQ/master
2019-09-25 Eddie HungMerge pull request #1401 from SergeyDegtyar/SergeyDegty...
2019-09-18 Eddie HungMerge pull request #1355 from YosysHQ/eddie/peepopt_dff...
2019-09-18 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-18 Eddie HungMerge pull request #1379 from mmicko/sim_models
2019-09-18 Miodrag Milanovicmake note that it is for latch mode
2019-09-18 Miodrag Milanovicbetter lut handling
2019-09-15 Miodrag MilanovicAdded simulation models for Efinix and Anlogic
2019-09-04 Pepijn de VosMerge remote-tracking branch 'diego/gowin'
2019-08-30 Eddie HungMerge branch 'xc7dsp' of github.com:YosysHQ/yosys into...
2019-08-30 David ShahMerge branch 'master' into xc7dsp
2019-08-29 SergeyMerge pull request #3 from YosysHQ/Sergey/tests_ice40
2019-08-28 Eddie HungMerge remote-tracking branch 'origin/clifford/async2syn...
2019-08-26 Clifford WolfMerge tag 'yosys-0.9'
2019-08-25 Clifford WolfMerge pull request #1112 from acw1251/pyosys_sigsig_issue
2019-08-23 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_...
2019-08-23 Eddie HungMerge remote-tracking branch 'origin/master' into mwk...
2019-08-22 Eddie HungMerge pull request #1319 from TeaEngineering/shuckc...
2019-08-22 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-22 Eddie HungMerge pull request #1317 from YosysHQ/eddie/opt_expr_shiftx
2019-08-22 Clifford WolfFix missing newline at end of file
2019-08-22 Clifford WolfMerge pull request #1289 from mmicko/anlogic_fixes
2019-08-20 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-18 Miodrag MilanovicMerge remote-tracking branch 'upstream/master' into...
2019-08-16 Eddie HungMerge branch 'eddie/abc9_refactor' into xaig_dff
2019-08-16 Eddie HungMerge pull request #1250 from bwidawsk/master
2019-08-16 Eddie HungMerge https://github.com/bogdanvuk/yosys into bogdanvuk...
2019-08-12 Miodrag MilanovicProper arith for Anlogic and use standard pass
2019-08-12 Serge BazanskiMerge pull request #1152 from 1138-4EB/feat-docker
2019-08-09 Miodrag MilanovicMerge remote-tracking branch 'upstream/master' into...
2019-08-08 David ShahMerge branch 'xc7dsp' of github.com:YosysHQ/yosys into...
2019-08-07 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-08-07 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-07 Jim LawsonMerge branch 'master' into firrtl_err_on_unsupported_cell
2019-08-07 David ShahMerge pull request #1260 from YosysHQ/dave/ecp5_cell_fixes
2019-08-07 Clifford WolfMerge pull request #1213 from YosysHQ/eddie/wreduce_add
2019-08-07 Clifford WolfMerge pull request #1240 from ucb-bar/firrtl-properties...
2019-08-07 Clifford WolfMerge pull request #1249 from mmicko/anlogic_fix
2019-08-07 David ShahMerge pull request #1241 from YosysHQ/clifford/jsonfix
2019-08-06 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-03 Miodrag Milanovicanlogic : Fix alu mapping
2019-08-03 whitequarkMerge pull request #1242 from jfng/fix-proc_prune-partial
2019-08-02 Clifford WolfMerge pull request #1238 from mmicko/vsbuild_fix
2019-08-02 Miodrag MilanovicFix formatting for msys2 mingw build using GetSize
2019-08-02 Clifford WolfMerge pull request #1239 from mmicko/mingw_fix
2019-08-01 Miodrag MilanovicFix formatting for msys2 mingw build using GetSize
2019-06-13 Serge BazanskiMerge pull request #829 from abdelrahmanhosny/master
2019-04-18 Eddie HungRevert "synth_* with -retime option now calls abc with...
2019-04-18 Eddie HungMerge branch 'master' into eddie/fix_retime
2019-04-10 Eddie Hungsynth_* with -retime option now calls abc with -D 1...
2019-04-08 Eddie HungMerge branch 'master' into xaig
2019-03-28 Benedikt TutzerMerge remote-tracking branch 'origin/master' into featu...
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger
2019-03-14 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit
2019-03-01 Jim LawsonMerge remote-tracking branch 'upstream/master'
2019-03-01 Clifford WolfMerge pull request #836 from elmsfu/ice40_2bit_ram_rw_mode
2019-02-28 Larry DoolittleReduce amount of trailing whitespace in code base
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve
2019-02-17 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-02-11 Jim LawsonMerge remote-tracking branch 'upstream/master'
2019-01-27 Clifford WolfMerge pull request #798 from mmicko/master
2019-01-25 Miodrag MilanovicFixed Anlogic simulation model
2019-01-02 Clifford WolfMerge pull request #770 from whitequark/opt_expr_cmp
2019-01-02 Clifford WolfMerge pull request #755 from Icenowy/anlogic-dram-init
2019-01-02 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init
2019-01-02 Clifford WolfMerge pull request #773 from whitequark/opt_lut_elim_fixes
2019-01-02 Clifford WolfMerge pull request #772 from whitequark/synth_lut
2019-01-02 Clifford WolfMerge pull request #771 from whitequark/techmap_cmp2lut
2019-01-02 Clifford WolfMerge pull request #769 from whitequark/typos
2019-01-02 whitequarkFix typographical and grammatical errors and inconsiste...
2018-12-31 Clifford WolfMerge pull request #766 from Icenowy/anlogic-latches
2018-12-25 Icenowy Zhenganlogic: add latch cells
2018-12-23 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
2018-12-22 Clifford WolfMerge pull request #757 from whitequark/manual_mem
2018-12-19 Icenowy Zhenganlogic: implement DRAM initialization
2018-12-19 Clifford WolfMerge pull request #752 from Icenowy/anlogic-lut-cost
2018-12-19 Clifford WolfMerge pull request #753 from Icenowy/anlogic-makefile-fix
2018-12-19 Clifford WolfMerge pull request #749 from Icenowy/anlogic-dram-fix
2018-12-19 Icenowy Zhenganlogic: fix Makefile.inc
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