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Try new LUT delays
[yosys.git] / techlibs / anlogic /
2019-04-18 Eddie HungRevert "synth_* with -retime option now calls abc with... tree | commitdiff
2019-04-18 Eddie HungMerge branch 'master' into eddie/fix_retime tree | commitdiff
2019-04-10 Eddie Hungsynth_* with -retime option now calls abc with -D 1... tree | commitdiff
2019-04-08 Eddie HungMerge branch 'master' into xaig tree | commitdiff
2019-03-28 Benedikt TutzerMerge remote-tracking branch 'origin/master' into featu... tree | commitdiff
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger tree | commitdiff
2019-03-14 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl tree | commitdiff
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit tree | commitdiff
2019-03-01 Jim LawsonMerge remote-tracking branch 'upstream/master' tree | commitdiff
2019-03-01 Clifford WolfMerge pull request #836 from elmsfu/ice40_2bit_ram_rw_mode tree | commitdiff
2019-02-28 Larry DoolittleReduce amount of trailing whitespace in code base tree | commitdiff
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve tree | commitdiff
2019-02-17 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into... tree | commitdiff
2019-02-11 Jim LawsonMerge remote-tracking branch 'upstream/master' tree | commitdiff
2019-01-27 Clifford WolfMerge pull request #798 from mmicko/master tree | commitdiff
2019-01-25 Miodrag MilanovicFixed Anlogic simulation model tree | commitdiff
2019-01-02 Clifford WolfMerge pull request #770 from whitequark/opt_expr_cmp tree | commitdiff
2019-01-02 Clifford WolfMerge pull request #755 from Icenowy/anlogic-dram-init tree | commitdiff
2019-01-02 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys tree | commitdiff
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init tree | commitdiff
2019-01-02 Clifford WolfMerge pull request #773 from whitequark/opt_lut_elim_fixes tree | commitdiff
2019-01-02 Clifford WolfMerge pull request #772 from whitequark/synth_lut tree | commitdiff
2019-01-02 Clifford WolfMerge pull request #771 from whitequark/techmap_cmp2lut tree | commitdiff
2019-01-02 Clifford WolfMerge pull request #769 from whitequark/typos tree | commitdiff
2019-01-02 whitequarkFix typographical and grammatical errors and inconsiste... tree | commitdiff
2018-12-31 Clifford WolfMerge pull request #766 from Icenowy/anlogic-latches tree | commitdiff
2018-12-25 Icenowy Zhenganlogic: add latch cells tree | commitdiff
2018-12-23 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys tree | commitdiff
2018-12-22 Clifford WolfMerge pull request #757 from whitequark/manual_mem tree | commitdiff
2018-12-19 Icenowy Zhenganlogic: implement DRAM initialization tree | commitdiff
2018-12-19 Clifford WolfMerge pull request #752 from Icenowy/anlogic-lut-cost tree | commitdiff
2018-12-19 Clifford WolfMerge pull request #753 from Icenowy/anlogic-makefile-fix tree | commitdiff
2018-12-19 Clifford WolfMerge pull request #749 from Icenowy/anlogic-dram-fix tree | commitdiff
2018-12-19 Icenowy Zhenganlogic: fix Makefile.inc tree | commitdiff
2018-12-19 Icenowy ZhengAnlogic: let LUT5/6 have more cost than LUT4- tree | commitdiff
2018-12-18 Jim LawsonMerge remote-tracking branch 'upstream/master' tree | commitdiff
2018-12-18 Icenowy Zhenganlogic: set the init value of DFFs tree | commitdiff
2018-12-18 Icenowy Zhenganlogic: fix dbits of Anlogic Eagle DRAM16X4 tree | commitdiff
2018-12-17 Clifford WolfMerge pull request #746 from Icenowy/anlogic-dram tree | commitdiff
2018-12-17 Icenowy Zhenganlogic: add support for Eagle Distributed RAM tree | commitdiff
2018-12-17 Icenowy ZhengRevert "Leave only real black box cells" tree | commitdiff
2018-12-16 Clifford WolfMerge pull request #704 from webhat/feature/fix-awk tree | commitdiff
2018-12-05 Clifford WolfMerge pull request #709 from smunaut/issue_708 tree | commitdiff
2018-12-05 Clifford WolfMerge pull request #713 from Diego-HR/master tree | commitdiff
2018-12-05 Clifford WolfMerge pull request #712 from mmicko/anlogic-support tree | commitdiff
2018-12-02 Miodrag MilanovicLeave only real black box cells tree | commitdiff
2018-12-01 Miodrag MilanovicInitial support for Anlogic FPGA tree | commitdiff