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Remove abc_flop attributes for now
[yosys.git]
/
techlibs
/
coolrunner2
/
cells_sim.v
2017-08-15
Clifford Wolf
Merge branch 'rmports' of https://github.com/azonenberg...
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2017-08-14
Clifford Wolf
Merge pull request #381 from azonenberg/countfix
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2017-08-14
Clifford Wolf
Merge pull request #383 from azonenberg/abcfnames
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2017-08-14
Clifford Wolf
Merge pull request #382 from azonenberg/jsoniofix
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2017-08-14
Clifford Wolf
Merge pull request #384 from azonenberg/crtechlib
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2017-08-14
Robert Ou
coolrunner2: Add INVERT parameter to some BUFGs
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2017-08-14
Robert Ou
coolrunner2: Add FFs with clock enable to cells_sim.v
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2017-07-03
Clifford Wolf
Merge pull request #352 from rqou/master
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2017-06-26
Robert Ou
coolrunner2: Add a few more primitives
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2017-06-26
Robert Ou
coolrunner2: Initial mapping of latches
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2017-06-26
Robert Ou
coolrunner2: Initial mapping of DFFs
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2017-06-26
Robert Ou
coolrunner2: Remove redundant INVERT_PTC
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2017-06-26
Robert Ou
coolrunner2: Also construct the XOR cell in the macrocell
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2017-06-26
Robert Ou
coolrunner2: Initial techmapping for $sop
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2017-06-24
Robert Ou
coolrunner2: Initial commit
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