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Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux
[yosys.git] / techlibs / ecp5 / cells_sim.v
2019-04-08 Eddie HungMerge branch 'master' into xaig blob | commitdiff | raw
2019-03-28 Benedikt TutzerMerge remote-tracking branch 'origin/master' into featu... blob | commitdiff | raw
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger blob | commitdiff | raw
2019-03-14 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl blob | commitdiff | raw
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit blob | commitdiff | raw
2019-03-04 Jim LawsonMerge remote-tracking branch 'upstream/master' blob | commitdiff | raw
2019-03-01 Clifford WolfMerge pull request #841 from mmicko/master blob | commitdiff | raw
2019-03-01 Jim LawsonMerge remote-tracking branch 'upstream/master' blob | commitdiff | raw | diff to current
2019-03-01 Miodrag MilanovicFix ECP5 cells_sim for iverilog blob | commitdiff | raw
2019-03-01 Clifford WolfMerge pull request #836 from elmsfu/ice40_2bit_ram_rw_mode blob | commitdiff | raw | diff to current
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve blob | commitdiff | raw | diff to current
2019-02-28 Clifford WolfMerge pull request #827 from ucb-bar/firrtlfixes blob | commitdiff | raw | diff to current
2019-02-26 Eddie HungMerge remote-tracking branch 'origin/master' into xaig blob | commitdiff | raw | diff to current
2019-02-26 Larry DoolittleClean up some whitepsace outliers blob | commitdiff | raw | diff to current
2019-02-25 David Shahecp5: Compatibility with Migen AsyncResetSynchronizer blob | commitdiff | raw | diff to current
2019-01-21 David Shahecp5: Add LSRMODE to flipflops for PRLD support blob | commitdiff | raw | diff to current
2018-12-18 Jim LawsonMerge remote-tracking branch 'upstream/master' blob | commitdiff | raw | diff to current
2018-12-01 Clifford WolfMerge pull request #676 from rafaeltp/master blob | commitdiff | raw | diff to current
2018-11-12 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys blob | commitdiff | raw | diff to current
2018-11-12 Clifford WolfMerge pull request #697 from eddiehung/xilinx_ps7 blob | commitdiff | raw | diff to current
2018-11-12 Clifford WolfMerge pull request #695 from daveshah1/ecp5_bb blob | commitdiff | raw | diff to current
2018-11-07 David Shahecp5: Adding some blackbox cells blob | commitdiff | raw | diff to current
2018-10-21 rafaeltpMerge pull request #1 from YosysHQ/master blob | commitdiff | raw | diff to current
2018-10-19 Clifford WolfMerge pull request #673 from daveshah1/ecp5_improve blob | commitdiff | raw | diff to current
2018-10-19 David Shahecp5: Sim model fixes blob | commitdiff | raw | diff to current
2018-10-19 Clifford WolfMerge pull request #672 from daveshah1/fix_bram blob | commitdiff | raw | diff to current
2018-10-18 Clifford WolfMerge pull request #659 from rubund/sv_interfaces blob | commitdiff | raw | diff to current
2018-10-18 Clifford WolfMerge pull request #657 from mithro/xilinx-vpr blob | commitdiff | raw | diff to current
2018-10-18 Clifford WolfMerge pull request #664 from tklam/ignore-verilog-protect blob | commitdiff | raw | diff to current
2018-10-17 Clifford WolfMerge pull request #660 from tklam/parse-liberty-detect... blob | commitdiff | raw | diff to current
2018-10-17 Clifford WolfMerge pull request #663 from aman-goel/master blob | commitdiff | raw | diff to current
2018-10-17 Clifford WolfMerge pull request #658 from daveshah1/ecp5_bram blob | commitdiff | raw | diff to current
2018-10-10 David Shahecp5: First BRAM type maps successfully blob | commitdiff | raw | diff to current
2018-10-10 David Shahecp5: Script for BRAM IO connections blob | commitdiff | raw | diff to current
2018-10-09 David Shahecp5: Adding BRAM initialisation and config blob | commitdiff | raw | diff to current
2018-10-05 David Shahecp5: Add blackbox for DP16KD blob | commitdiff | raw | diff to current
2018-09-17 Udi FinkelsteinMerge branch 'master' into pr_reg_wire_error blob | commitdiff | raw | diff to current
2018-08-22 Jim LawsonMerge pull request #1 from YosysHQ/master blob | commitdiff | raw | diff to current
2018-08-15 Clifford WolfMerge pull request #573 from cr1901/msys-64 blob | commitdiff | raw | diff to current
2018-08-15 Clifford WolfMerge pull request #576 from cr1901/no-resource blob | commitdiff | raw | diff to current
2018-08-15 Clifford WolfMerge pull request #513 from udif/pr_reg_wire_error blob | commitdiff | raw | diff to current
2018-08-15 Clifford WolfMerge pull request #562 from udif/pr_fix_illegal_port_decl blob | commitdiff | raw | diff to current
2018-07-18 Aman GoelMerge pull request #2 from YosysHQ/master blob | commitdiff | raw | diff to current
2018-07-16 Clifford WolfMerge pull request #581 from daveshah1/ecp5 blob | commitdiff | raw | diff to current
2018-07-16 David Shahecp5: Fixing miscellaneous sim model issues blob | commitdiff | raw | diff to current
2018-07-16 David Shahecp5: Fixing 'X' issues with LUT simulation models blob | commitdiff | raw | diff to current
2018-07-16 David Shahecp5: ECP5 synthesis fixes blob | commitdiff | raw | diff to current
2018-07-13 David Shahecp5: Cells and mappings fixes blob | commitdiff | raw | diff to current
2018-07-13 David Shahecp5: Adding DFF maps blob | commitdiff | raw | diff to current
2018-07-13 David Shahecp5: Adding DRAM map blob | commitdiff | raw | diff to current
2018-07-13 David Shahecp5: Adding basic cells_sim and mapper for LUTs up... blob | commitdiff | raw | diff to current