btor backend: add option to not include internal names
[yosys.git] / techlibs / greenpak4 / cells_sim.v
2017-09-02 Clifford WolfMerge pull request #406 from azonenberg/coolrunner...
2017-09-02 Clifford WolfMerge pull request #405 from azonenberg/gpak-refactoring
2017-09-01 Andrew ZonenbergRefactoring: moved modules still in cells_sim to cells_...
2017-08-28 Clifford WolfMerge branch 'recover-reduce' of https://github.com...
2017-08-28 Clifford WolfMerge pull request #392 from azonenberg/greenpak-portfixes
2017-08-27 Andrew ZonenbergFixed bug causing GP_SPI model to not synthesize
2017-08-15 Clifford WolfMerge branch 'rmports' of https://github.com/azonenberg...
2017-08-14 Clifford WolfMerge pull request #381 from azonenberg/countfix
2017-08-14 Andrew ZonenbergFinished initial GP_COUNT8/14/8_ADV/14_ADV sim models...
2017-08-14 Andrew ZonenbergImproved cells_sim_digital model for GP_COUNT8
2017-08-14 Andrew ZonenbergRefactored GreenPAK4 cells_sim into cells_sim_ams and...
2017-02-25 Clifford WolfMerge branch 'master' of https://github.com/klammerj...
2017-02-25 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2017-02-24 Clifford WolfMerge pull request #322 from azonenberg/master
2017-02-24 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-16 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-14 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-11 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-09 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-01-15 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-01-05 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-01-01 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-01-01 Andrew Zonenberggreenpak4: Added POUT to GP_COUNTx cells
2016-12-24 Clifford WolfMerge pull request #284 from azonenberg/master
2016-12-23 Andrew ZonenbergMerge pull request #1 from azonenberg-hk/master
2016-12-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-12-21 Andrew Zonenberggreenpak4: Added INT pin to GP_SPI
2016-12-21 Andrew Zonenberggreenpak4: removed unused MISO pin from GP_SPI
2016-12-20 Andrew Zonenberggreenpak4: Removed SPI_BUFFER parameter
2016-12-20 Andrew Zonenberggreenpak4: replaced MOSI/MISO with single one-way SDAT pin
2016-12-20 Andrew Zonenberggreenpak4: Changed port names on GP_SPI for clarity
2016-12-20 Andrew Zonenberggreenpak4: Initial implementation of GP_SPI cell
2016-12-17 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-12-17 Andrew Zonenberggreenpak4: Updated GP_DCMP cell model
2016-12-16 Andrew Zonenberggreenpak: Fixes to GP_DCMP* blocks. Added GP_CLKBUF.
2016-12-15 Andrew Zonenberggreenpak4: Initial version of GP_DCMP skeleton (not...
2016-12-14 Andrew Zonenberggreenpak4: More fixups of GP_DCMPx cells
2016-12-14 Andrew Zonenberggreenpak4: And another typo :(
2016-12-14 Andrew Zonenberggreenpak4: Fixed another typo
2016-12-14 Andrew Zonenberggreenpak4: Fixed typo
2016-12-14 Andrew Zonenberggreenpak4: Cleaned up trailing spaces in cells_sim
2016-12-14 Andrew Zonenberggreenpak4: Added GP_DCMPREF / GP_DCMPMUX
2016-12-12 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-12-11 Andrew ZonenbergAdded GP_PWRDET block, BANDWIDTH_KHZ parameter to GP_ABUF
2016-12-10 Andrew Zonenberggreenpak4: Inverted D latch cells now have nQ instead...
2016-12-06 Andrew ZonenbergAdded GP_DLATCH and GP_DLATCHI
2016-12-06 Andrew ZonenbergInitial implementation of techlib support for GreenPAK...
2016-10-19 Clifford WolfMerge pull request #250 from azonenberg/master
2016-10-19 Andrew ZonenbergFixed typo in last commit
2016-10-19 Andrew Zonenberggreenpak4: Added GP_PGEN cell definition
2016-10-19 Andrew ZonenbergAdded GLITCH_FILTER parameter to GP_DELAY
2016-10-19 Andrew Zonenberggreenpak4: added model for GP_EDGEDET block
2016-10-19 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-10-17 Andrew Zonenberggreenpak4: Changed parameters for GP_SYSRESET
2016-08-14 Clifford WolfMerge pull request #200 from azonenberg/master
2016-08-14 Andrew Zonenberggreenpak4: Changed name of inverted output ports for...
2016-08-14 Andrew Zonenberggreenpak4: Added GP_DFFxI cells
2016-08-14 Andrew Zonenberggreenpak4: Renamed ports for better consistency (see...
2016-07-13 Clifford WolfMerge pull request #191 from whitequark/json-module...
2016-07-13 Clifford WolfMerge pull request #193 from azonenberg/master
2016-07-12 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-07-12 Andrew ZonenbergAdded GP_DAC cell
2016-07-12 Andrew ZonenbergRemoved VOUT port of GP_BANDGAP
2016-07-10 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-07-10 Clifford WolfMerge pull request #189 from whitequark/master
2016-07-10 whitequarkgreenpak4: add GP_COUNT{8,14}_ADV cells.
2016-07-08 Clifford WolfMerge branch 'yosys-0.5-vtr' of https://github.com...
2016-05-08 Clifford WolfMerge pull request #162 from azonenberg/master
2016-05-08 Andrew ZonenbergAdded GP_DELAY cell
2016-05-08 Andrew ZonenbergFixed typo in port name
2016-05-08 Andrew ZonenbergFixed extra semicolon
2016-05-08 Andrew ZonenbergFixed typo in parameter name
2016-05-08 Andrew ZonenbergAdded simulation timescale declaration
2016-05-05 Clifford WolfMerge pull request #159 from azonenberg/master
2016-05-05 Andrew ZonenbergRenamed module parameter
2016-05-04 Clifford WolfMerge pull request #157 from azonenberg/master
2016-05-04 Andrew ZonenbergFixed incorrect signal naming in GP_IOBUF
2016-05-04 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-05-04 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-05-04 Andrew ZonenbergAdded tri-state I/O extraction for GreenPak
2016-05-04 Andrew ZonenbergAdded GreenPak I/O buffer cells
2016-05-03 Andrew ZonenbergAdded comment to clarify GP_ABUF cell
2016-05-03 Andrew ZonenbergAdded GP_ABUF cell
2016-05-02 Clifford WolfMerge pull request #154 from azonenberg/master
2016-05-01 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-29 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-28 Andrew ZonenbergAdded GP_PGA cell
2016-04-25 Clifford WolfMerge pull request #150 from azonenberg/master
2016-04-25 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-25 Andrew ZonenbergRemoved VIN_BUF_EN
2016-04-24 Andrew ZonenbergRenamed VOUT to OUT on GP_ACMP cell
2016-04-24 Andrew ZonenbergAdded GP_ACMP cell
2016-04-23 Clifford WolfMerge https://github.com/azonenberg/yosys
2016-04-23 Andrew ZonenbergFixed typo
2016-04-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-21 Andrew ZonenbergAdded GP_VREF cell
2016-04-19 Clifford WolfMerge pull request #149 from azonenberg/master
2016-04-19 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-17 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-16 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
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