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Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc
[yosys.git]
/
techlibs
/
greenpak4
/
cells_sim.v
2017-09-02
Clifford Wolf
Merge pull request #406 from azonenberg/coolrunner...
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2017-09-02
Clifford Wolf
Merge pull request #405 from azonenberg/gpak-refactoring
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2017-09-01
Andrew Zonenberg
Refactoring: moved modules still in cells_sim to cells_...
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2017-08-28
Clifford Wolf
Merge branch 'recover-reduce' of https://github.com...
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2017-08-28
Clifford Wolf
Merge pull request #392 from azonenberg/greenpak-portfixes
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2017-08-27
Andrew Zonenberg
Fixed bug causing GP_SPI model to not synthesize
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2017-08-15
Clifford Wolf
Merge branch 'rmports' of https://github.com/azonenberg...
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2017-08-14
Clifford Wolf
Merge pull request #381 from azonenberg/countfix
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2017-08-14
Andrew Zonenberg
Finished initial GP_COUNT8/14/8_ADV/14_ADV sim models...
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2017-08-14
Andrew Zonenberg
Improved cells_sim_digital model for GP_COUNT8
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2017-08-14
Andrew Zonenberg
Refactored GreenPAK4 cells_sim into cells_sim_ams and...
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2017-02-25
Clifford Wolf
Merge branch 'master' of https://github.com/klammerj...
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2017-02-25
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2017-02-24
Clifford Wolf
Merge pull request #322 from azonenberg/master
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2017-02-24
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-02-16
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-02-14
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-02-11
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-02-09
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-01-15
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-01-05
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-01-01
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-01-01
Andrew Zonenberg
greenpak4: Added POUT to GP_COUNTx cells
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2016-12-24
Clifford Wolf
Merge pull request #284 from azonenberg/master
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2016-12-23
Andrew Zonenberg
Merge pull request #1 from azonenberg-hk/master
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2016-12-23
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-12-21
Andrew Zonenberg
greenpak4: Added INT pin to GP_SPI
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2016-12-21
Andrew Zonenberg
greenpak4: removed unused MISO pin from GP_SPI
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2016-12-20
Andrew Zonenberg
greenpak4: Removed SPI_BUFFER parameter
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2016-12-20
Andrew Zonenberg
greenpak4: replaced MOSI/MISO with single one-way SDAT pin
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2016-12-20
Andrew Zonenberg
greenpak4: Changed port names on GP_SPI for clarity
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2016-12-20
Andrew Zonenberg
greenpak4: Initial implementation of GP_SPI cell
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2016-12-17
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-12-17
Andrew Zonenberg
greenpak4: Updated GP_DCMP cell model
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2016-12-16
Andrew Zonenberg
greenpak: Fixes to GP_DCMP* blocks. Added GP_CLKBUF.
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2016-12-15
Andrew Zonenberg
greenpak4: Initial version of GP_DCMP skeleton (not...
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2016-12-14
Andrew Zonenberg
greenpak4: More fixups of GP_DCMPx cells
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2016-12-14
Andrew Zonenberg
greenpak4: And another typo :(
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2016-12-14
Andrew Zonenberg
greenpak4: Fixed another typo
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2016-12-14
Andrew Zonenberg
greenpak4: Fixed typo
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2016-12-14
Andrew Zonenberg
greenpak4: Cleaned up trailing spaces in cells_sim
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2016-12-14
Andrew Zonenberg
greenpak4: Added GP_DCMPREF / GP_DCMPMUX
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2016-12-12
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-12-11
Andrew Zonenberg
Added GP_PWRDET block, BANDWIDTH_KHZ parameter to GP_ABUF
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2016-12-10
Andrew Zonenberg
greenpak4: Inverted D latch cells now have nQ instead...
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2016-12-06
Andrew Zonenberg
Added GP_DLATCH and GP_DLATCHI
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2016-12-06
Andrew Zonenberg
Initial implementation of techlib support for GreenPAK...
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2016-10-19
Clifford Wolf
Merge pull request #250 from azonenberg/master
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2016-10-19
Andrew Zonenberg
Fixed typo in last commit
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2016-10-19
Andrew Zonenberg
greenpak4: Added GP_PGEN cell definition
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2016-10-19
Andrew Zonenberg
Added GLITCH_FILTER parameter to GP_DELAY
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2016-10-19
Andrew Zonenberg
greenpak4: added model for GP_EDGEDET block
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2016-10-19
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-10-17
Andrew Zonenberg
greenpak4: Changed parameters for GP_SYSRESET
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2016-08-14
Clifford Wolf
Merge pull request #200 from azonenberg/master
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2016-08-14
Andrew Zonenberg
greenpak4: Changed name of inverted output ports for...
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2016-08-14
Andrew Zonenberg
greenpak4: Added GP_DFFxI cells
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2016-08-14
Andrew Zonenberg
greenpak4: Renamed ports for better consistency (see...
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2016-07-13
Clifford Wolf
Merge pull request #191 from whitequark/json-module...
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2016-07-13
Clifford Wolf
Merge pull request #193 from azonenberg/master
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2016-07-12
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-07-12
Andrew Zonenberg
Added GP_DAC cell
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2016-07-12
Andrew Zonenberg
Removed VOUT port of GP_BANDGAP
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2016-07-10
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2016-07-10
Clifford Wolf
Merge pull request #189 from whitequark/master
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2016-07-10
whitequark
greenpak4: add GP_COUNT{8,14}_ADV cells.
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2016-05-08
Clifford Wolf
Merge pull request #162 from azonenberg/master
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2016-05-08
Andrew Zonenberg
Added GP_DELAY cell
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2016-05-08
Andrew Zonenberg
Fixed typo in port name
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2016-05-08
Andrew Zonenberg
Fixed extra semicolon
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2016-05-08
Andrew Zonenberg
Fixed typo in parameter name
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2016-05-08
Andrew Zonenberg
Added simulation timescale declaration
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2016-05-05
Clifford Wolf
Merge pull request #159 from azonenberg/master
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2016-05-05
Andrew Zonenberg
Renamed module parameter
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2016-05-04
Clifford Wolf
Merge pull request #157 from azonenberg/master
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2016-05-04
Andrew Zonenberg
Fixed incorrect signal naming in GP_IOBUF
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2016-05-04
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-05-04
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2016-05-04
Andrew Zonenberg
Added tri-state I/O extraction for GreenPak
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2016-05-04
Andrew Zonenberg
Added GreenPak I/O buffer cells
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2016-05-03
Andrew Zonenberg
Added comment to clarify GP_ABUF cell
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2016-05-03
Andrew Zonenberg
Added GP_ABUF cell
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2016-05-02
Clifford Wolf
Merge pull request #154 from azonenberg/master
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2016-05-01
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-29
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-28
Andrew Zonenberg
Added GP_PGA cell
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2016-04-25
Clifford Wolf
Merge pull request #150 from azonenberg/master
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2016-04-25
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-25
Andrew Zonenberg
Removed VIN_BUF_EN
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2016-04-24
Andrew Zonenberg
Renamed VOUT to OUT on GP_ACMP cell
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2016-04-24
Andrew Zonenberg
Added GP_ACMP cell
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2016-04-23
Clifford Wolf
Merge https://github.com/azonenberg/yosys
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2016-04-23
Andrew Zonenberg
Fixed typo
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2016-04-23
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-21
Andrew Zonenberg
Added GP_VREF cell
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2016-04-19
Clifford Wolf
Merge pull request #149 from azonenberg/master
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2016-04-19
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-17
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-16
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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