projects
/
yosys.git
/ history
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
first ⋅ prev ⋅ next
Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc
[yosys.git]
/
techlibs
/
intel
/
cyclone10
/
2018-09-17
Udi Finkelstein
Merge branch 'master' into pr_reg_wire_error
tree
|
commitdiff
2018-08-15
Clifford Wolf
Merge pull request #513 from udif/pr_reg_wire_error
tree
|
commitdiff
2018-04-01
Clifford Wolf
Merge pull request #522 from c60k28/master
tree
|
commitdiff
2018-04-01
c60k28
Fixed broken Quartus backend on dffeas init value ...
tree
|
commitdiff
2017-11-28
Clifford Wolf
Merge pull request #462 from daveshah1/up5k
tree
|
commitdiff
2017-11-24
Clifford Wolf
Merge pull request #446 from mithro/travis-rework
tree
|
commitdiff
2017-11-18
Clifford Wolf
Merge pull request #455 from daveshah1/up5k
tree
|
commitdiff
2017-11-18
Clifford Wolf
Merge pull request #452 from cr1901/master
tree
|
commitdiff
2017-11-18
Clifford Wolf
Merge pull request #453 from dh73/master
tree
|
commitdiff
2017-11-09
dh73
Initial Cyclone 10 support
tree
|
commitdiff