Merge remote-tracking branch 'origin/master' into xaig_dff
[yosys.git] / techlibs / xilinx / abc9_map.v
2019-12-20 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-12-20 Eddie HungAdd RAM{32,64}M to abc9_map.v
2019-12-19 Eddie HungAdd RAM{32,64}M to abc9_map.v
2019-12-19 Eddie HungSplit into $__ABC9_ASYNC[01], do not add cell->type...
2019-12-19 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-12-19 Eddie HungMerge pull request #1558 from YosysHQ/eddie/xaiger_cleanup
2019-12-19 Eddie HungMerge pull request #1569 from YosysHQ/eddie/fix_1531
2019-12-19 Eddie HungMerge pull request #1571 from YosysHQ/eddie/fix_1570
2019-12-18 David ShahMerge pull request #1563 from YosysHQ/dave/async-prld
2019-12-18 Eddie HungMerge pull request #1572 from nakengelhardt/scratchpad_pass
2019-12-16 Eddie HungMerge pull request #1577 from gromero/for-yosys
2019-12-13 Eddie HungMerge pull request #1533 from dh73/bram_xilinx
2019-12-12 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-12-12 Eddie Hungabc9_map.v: fix Xilinx LUTRAM
2019-12-12 Eddie Hungabc9_map.v: fix Xilinx LUTRAM
2019-12-07 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-12-07 Eddie HungRemove creation of $abc9_control_wire
2019-12-06 Eddie Hungabc9 to use mergeability class to differentiate sync...
2019-12-05 Eddie HungRevert "Special abc9_clock wire to contain only clock...
2019-12-05 Eddie HungMissing wire declaration
2019-12-05 Eddie Hungabc9_map.v to transform INIT=1 to INIT=0
2019-12-05 Eddie Hungoutput reg Q -> output Q to suppress warning
2019-12-05 Eddie Hungabc9_map.v to do `zinit' and make INIT = 1'b0
2019-12-04 Eddie HungAdd abc9_init wire, attach to abc9_flop cell
2019-12-03 Eddie HungRevert "Add INIT value to abc9_control"
2019-12-02 Eddie HungAdd INIT value to abc9_control
2019-11-28 Eddie HungMerge remote-tracking branch 'origin/eddie/submod_po...
2019-11-27 Eddie HungMerge remote-tracking branch 'origin/eddie/submod_po...
2019-11-27 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-11-27 Eddie HungMerge remote-tracking branch 'origin/eddie/submod_po...
2019-11-27 Eddie HungMerge remote-tracking branch 'origin/eddie/write_xaiger...
2019-11-27 Eddie HungMerge remote-tracking branch 'origin/eddie/clkpart...
2019-11-27 Eddie HungMerge remote-tracking branch 'origin/eddie/submod_po...
2019-11-27 Eddie HungMerge branch 'master' into xaig_dff
2019-11-25 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-11-25 Eddie HungSpecial abc9_clock wire to contain only clock signal
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/clkpart...
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/clkpart...
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/clkpart...
2019-11-23 Eddie HungMerge pull request #1505 from YosysHQ/eddie/xaig_dff_adff
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/clkpart...
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/submod_po...
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/submod_po...
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/submod_po...
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/clkpart...
2019-11-23 Eddie HungMerge remote-tracking branch 'origin/eddie/submod_po...
2019-11-22 Eddie HungMerge branch 'eddie/clkpart' into xaig_dff
2019-11-22 Eddie HungMerge branch 'eddie/clkpart' into xaig_dff
2019-11-22 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-11-22 Eddie HungMerge remote-tracking branch 'origin/xaig_dff' into...
2019-11-22 Eddie HungMerge branch 'eddie/xaig_dff_adff' into xaig_dff
2019-11-20 Eddie HungFix INIT values
2019-11-20 Eddie HungDo not drop async control signals in abc_map.v
2019-11-19 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog...
2019-10-21 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ...
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/efinix
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/anlogic
2019-10-18 Miodrag MilanovićMerge branch 'master' into eddie/pr1352
2019-10-14 Clifford WolfUse "(id)" instead of "id" for types as temporary hack
2019-10-08 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-10-08 Eddie HungMerge pull request #1432 from YosysHQ/eddie/fix1427
2019-10-08 Eddie HungMerge pull request #1433 from YosysHQ/eddie/equiv_opt_a...
2019-10-08 Eddie HungMerge pull request #1437 from YosysHQ/eddie/abc_to_abc9
2019-10-07 Eddie HungCleanup
2019-10-07 Eddie HungRename $currQ to $abc9_currQ
2019-10-07 Eddie HungUpdate comments in abc9_map.v
2019-10-06 Eddie HungDo not require changes to cells_sim.v; try and work...
2019-10-05 Eddie HungMerge branch 'master' into eddie/abc_to_abc9
2019-10-05 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-10-05 Eddie HungFix merge issues
2019-10-04 Eddie HungMerge remote-tracking branch 'origin/eddie/abc_to_abc9...
2019-10-04 Eddie HungRename abc_* names/attributes to more precisely be...