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Muck about with LUT delays some more
[yosys.git]
/
techlibs
/
xilinx
/
arith_map.v
2019-05-26
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-05-23
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-05-23
Eddie Hung
Merge remote-tracking branch 'origin/eddie/opt_rmdff...
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2019-05-21
Eddie Hung
Instead of MUXCY/XORCY use CARRY4 (with timing)
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2019-04-08
Eddie Hung
Merge branch 'master' into xaig
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2019-04-01
Jim Lawson
Merge remote-tracking branch 'upstream/master'
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2019-03-28
Benedikt Tutzer
Merge remote-tracking branch 'origin/master' into featu...
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2019-03-19
Eddie Hung
Merge https://github.com/YosysHQ/yosys into read_aiger
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2019-03-14
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-03-09
Clifford Wolf
Merge pull request #859 from smunaut/ice40_braminit
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2019-03-05
Clifford Wolf
Merge pull request #842 from litghost/merge_upstream
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2019-03-01
Keith Rothman
Changes required for VPR place and route synth_xilinx.
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2015-01-18
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-01-18
Clifford Wolf
Various cleanups in xilinx techlib
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