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install *_nowide.lut files
[yosys.git]
/
techlibs
/
xilinx
/
brams.txt
2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-09-25
Clifford Wolf
Added read-enable to memory model
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-06
Clifford Wolf
Added support for initialized xilinx brams
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2015-01-18
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-01-18
Clifford Wolf
Various cleanups in xilinx techlib
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2015-01-18
Clifford Wolf
Refactoring of memory_bram and xilinx brams
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2015-01-06
Clifford Wolf
Xilinx RAMB36/RAMB18 memory_bram support complete
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2015-01-06
Clifford Wolf
Towards Xilinx bram support
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2015-01-06
Clifford Wolf
Towards Xilinx bram support
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2015-01-05
Clifford Wolf
Towards Xilinx bram support
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2015-01-04
Clifford Wolf
Towards Xilinx bram support
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2014-12-31
Clifford Wolf
Progress in memory_bram
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2014-12-31
Clifford Wolf
Added memory_bram (not functional yet)
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