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Merge branch 'eddie/xilinx_srl' into xaig_arrival
[yosys.git]
/
techlibs
/
xilinx
/
brams_init.py
2019-08-26
Clifford Wolf
Merge tag 'yosys-0.9'
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2019-08-25
Clifford Wolf
Merge pull request #1112 from acw1251/pyosys_sigsig_issue
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2019-08-16
Eddie Hung
Merge branch 'eddie/abc9_refactor' into xaig_dff
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2019-07-24
Jim Lawson
Merge remote-tracking branch 'upstream/master'
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2019-07-15
Eddie Hung
Merge branch 'master' into eddie/fix1178
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2019-07-14
Eddie Hung
Merge pull request #1194 from cr1901/miss-semi
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2019-07-12
Clifford Wolf
Merge pull request #1183 from whitequark/ice40-always...
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2019-07-11
Eddie Hung
Merge pull request #1182 from koriakin/xc6s-bram
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2019-07-11
Marcin KoĆcielnicki
synth_xilinx: Initial Spartan 6 block RAM inference...
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2018-03-11
Larry Doolittle
Squelch trailing whitespace, including meta-whitespace
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-08-22
Clifford Wolf
Switched to Python 3
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2015-08-16
Clifford Wolf
Another bugfix for ice40 and xilinx brams_init make...
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2015-04-06
Clifford Wolf
Added support for initialized xilinx brams
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