Merge branch 'eddie/xilinx_srl' into xaig_arrival
[yosys.git] / techlibs / xilinx / brams_init.py
2019-08-26 Clifford WolfMerge tag 'yosys-0.9'
2019-08-25 Clifford WolfMerge pull request #1112 from acw1251/pyosys_sigsig_issue
2019-08-16 Eddie HungMerge branch 'eddie/abc9_refactor' into xaig_dff
2019-07-24 Jim LawsonMerge remote-tracking branch 'upstream/master'
2019-07-15 Eddie HungMerge branch 'master' into eddie/fix1178
2019-07-14 Eddie HungMerge pull request #1194 from cr1901/miss-semi
2019-07-12 Clifford WolfMerge pull request #1183 from whitequark/ice40-always...
2019-07-11 Eddie HungMerge pull request #1182 from koriakin/xc6s-bram
2019-07-11 Marcin Koƛcielnickisynth_xilinx: Initial Spartan 6 block RAM inference...
2018-03-11 Larry DoolittleSquelch trailing whitespace, including meta-whitespace
2016-07-08 Clifford WolfMerge branch 'yosys-0.5-vtr' of https://github.com...
2015-12-07 Clifford WolfMerge pull request #108 from cseed/master
2015-08-22 Clifford WolfSwitched to Python 3
2015-08-16 Clifford WolfAnother bugfix for ice40 and xilinx brams_init make...
2015-04-06 Clifford WolfAdded support for initialized xilinx brams