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Add "synth_xilinx -arch"
[yosys.git]
/
techlibs
/
xilinx
/
synth_xilinx.cc
2019-05-07
Clifford Wolf
Add "synth_xilinx -arch"
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2019-05-06
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys into...
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2019-05-03
Eddie Hung
Merge remote-tracking branch 'origin/master' into cliff...
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2019-05-03
Clifford Wolf
Merge pull request #969 from YosysHQ/clifford/pmgenstuff
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2019-05-03
Eddie Hung
Revert "synth_xilinx to call dffinit with -noreinit"
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2019-05-03
Clifford Wolf
Merge pull request #976 from YosysHQ/clifford/fix974
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2019-05-03
Eddie Hung
synth_xilinx to call dffinit with -noreinit
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2019-05-02
Clifford Wolf
Merge pull request #963 from YosysHQ/eddie/synth_xilinx...
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2019-05-02
Eddie Hung
Back to passing all xc7srl tests!
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2019-05-02
Eddie Hung
Merge remote-tracking branch 'origin/master' into eddie...
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2019-05-01
Eddie Hung
Merge branch 'master' of github.com:YosysHQ/yosys
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2019-04-30
Clifford Wolf
Merge pull request #972 from YosysHQ/clifford/fix968
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2019-04-30
Clifford Wolf
Merge pull request #966 from YosysHQ/clifford/fix956
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2019-04-30
Clifford Wolf
Merge pull request #962 from YosysHQ/eddie/refactor_syn...
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2019-04-30
Clifford Wolf
Merge branch 'master' into eddie/refactor_synth_xilinx
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2019-04-30
Benedikt Tutzer
Merge branch 'master' of https://github.com/YosysHQ...
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2019-04-29
Clifford Wolf
Merge pull request #960 from YosysHQ/eddie/equiv_opt_undef
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2019-04-28
Eddie Hung
WIP
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2019-04-26
Eddie Hung
Revert synth_xilinx 'fine' label more to how it used...
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2019-04-26
Eddie Hung
Where did this check come from!?!
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2019-04-26
Eddie Hung
Refactor synth_xilinx to auto-generate doc
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2019-04-22
Eddie Hung
Merge pull request #914 from YosysHQ/xc7srl
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2019-04-22
Eddie Hung
Update help message
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2019-04-22
Eddie Hung
Move 'shregmap -tech xilinx' into map_cells
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2019-04-22
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-04-22
Clifford Wolf
Merge pull request #905 from christian-krieg/feature...
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2019-04-22
Clifford Wolf
Merge pull request #941 from Wren6991/sim_lib_io_clke
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2019-04-22
Clifford Wolf
Merge branch 'master' of https://github.com/dh73/yosys_...
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2019-04-22
Clifford Wolf
Re-added clean after techmap in synth_xilinx
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2019-04-22
Clifford Wolf
Merge pull request #916 from YosysHQ/map_cells_before_m...
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2019-04-22
Clifford Wolf
Merge pull request #911 from mmicko/gowin-nobram
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2019-04-22
Clifford Wolf
Merge pull request #909 from zachjs/master
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2019-04-21
Eddie Hung
Tidy up, fix for -nosrl
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2019-04-21
Eddie Hung
Merge branch 'map_cells_before_map_luts' into xc7srl
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2019-04-21
Eddie Hung
Merge branch 'master' into map_cells_before_map_luts
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2019-04-21
Eddie Hung
Add comments
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2019-04-21
Eddie Hung
Use new pmux2shiftx from #944, remove my old attempt
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2019-04-21
Eddie Hung
Merge remote-tracking branch 'origin/clifford/pmux2shif...
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2019-04-21
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-04-20
Clifford Wolf
Merge pull request #943 from YosysHQ/clifford/whitebox
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2019-04-20
Eddie Hung
Merge remote-tracking branch 'origin/pmux2shiftx' into...
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2019-04-20
Eddie Hung
Merge remote-tracking branch 'origin' into xc7srl
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2019-04-20
Clifford Wolf
Merge pull request #942 from YosysHQ/clifford/fix931
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2019-04-18
Eddie Hung
Merge pull request #917 from YosysHQ/eddie/fix_retime
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2019-04-18
Eddie Hung
Revert "synth_* with -retime option now calls abc with...
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2019-04-18
Eddie Hung
Merge branch 'master' into eddie/fix_retime
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2019-04-10
Eddie Hung
synth_* with -retime option now calls abc with -D 1...
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2019-04-10
Eddie Hung
Merge remote-tracking branch 'origin/master' into eddie...
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2019-04-08
Eddie Hung
Merge branch 'undo_pr895' into xc7srl
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2019-04-06
Eddie Hung
Call shregmap twice -- once for variable, another for...
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2019-04-05
Eddie Hung
Merge branch 'eddie/fix_retime' into xc7srl
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2019-04-05
Eddie Hung
Move dffinit til after abc
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2019-04-05
Eddie Hung
Merge branch 'eddie/fix_retime' into xc7srl
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2019-04-05
Eddie Hung
Move techamp t:$_DFF_?N? to before abc call
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2019-04-05
Eddie Hung
Resolve @daveshah1 comment, update synth_xilinx help
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2019-04-05
Eddie Hung
synth_xilinx to techmap FFs after abc call, otherwise...
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2019-04-05
Eddie Hung
techmap inside map_cells stage
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2019-04-04
Eddie Hung
Merge branch 'map_cells_before_map_luts' into xc7srl
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2019-04-04
Eddie Hung
Missing techmap entry in help
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2019-04-04
Eddie Hung
Merge branch 'map_cells_before_map_luts' into xc7srl
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2019-04-04
Eddie Hung
synth_xilinx to map_cells before map_luts
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2019-04-04
Eddie Hung
t:$dff* -> t:$dff t:$dffe
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2019-04-03
Eddie Hung
-nosrl meant when -nobram
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2019-04-03
Eddie Hung
Disable shregmap in synth_xilinx if -retime
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2019-04-03
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-03-28
Benedikt Tutzer
Merge remote-tracking branch 'origin/master' into featu...
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2019-03-25
Eddie Hung
synth_xilinx to use shregmap with -minlen 3
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2019-03-25
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-03-22
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-03-21
Eddie Hung
Add '-nosrl' option to synth_xilinx
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2019-03-19
Eddie Hung
Restore original synth_xilinx commands
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2019-03-19
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-03-19
Clifford Wolf
Merge pull request #885 from YosysHQ/clifford/fix873
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2019-03-19
Clifford Wolf
Add Xilinx negedge FFs to synth_xilinx dffinit call...
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2019-03-19
Eddie Hung
Merge https://github.com/YosysHQ/yosys into read_aiger
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2019-03-16
Eddie Hung
Cleanup synth_xilinx
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2019-03-16
Eddie Hung
Working
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2019-03-14
Eddie Hung
Misspell
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2019-03-14
Eddie Hung
Revert "Add shregmap -init_msb_first and use in synth_x...
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2019-03-14
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-03-14
Eddie Hung
Add shregmap -init_msb_first and use in synth_xilinx
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2019-03-14
Eddie Hung
Move shregmap until after first techmap
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2019-03-09
Clifford Wolf
Merge pull request #859 from smunaut/ice40_braminit
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2019-03-05
Clifford Wolf
Merge pull request #842 from litghost/merge_upstream
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2019-03-05
Clifford Wolf
Merge pull request #850 from daveshah1/ecp5_warn_conflict
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2019-03-05
Clifford Wolf
Merge pull request #851 from kprasadvnsi/master
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2019-03-05
Clifford Wolf
Merge pull request #852 from ucb-bar/firrtlfixes
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2019-03-05
Clifford Wolf
Use "write_edif -pvector bra" for Xilinx EDIF files
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2019-03-01
Keith Rothman
Use singular for disabling of DRAM or BRAM inference.
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2019-03-01
Keith Rothman
Modify arguments to match existing style.
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2019-03-01
Keith Rothman
Changes required for VPR place and route synth_xilinx.
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2019-02-28
Eddie Hung
synth_xilinx to call shregmap with enable support
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2019-02-28
Eddie Hung
synth_xilinx to use shregmap with -params too
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2019-02-28
Eddie Hung
synth_xilinx to now have shregmap call after dff2dffe
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2019-01-02
Clifford Wolf
Merge pull request #770 from whitequark/opt_expr_cmp
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2019-01-02
Clifford Wolf
Merge pull request #755 from Icenowy/anlogic-dram-init
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2019-01-02
Clifford Wolf
Merge pull request #750 from Icenowy/anlogic-ff-init
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2019-01-02
Clifford Wolf
Merge pull request #773 from whitequark/opt_lut_elim_fixes
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2019-01-02
Clifford Wolf
Merge pull request #772 from whitequark/synth_lut
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2019-01-02
Clifford Wolf
Merge pull request #771 from whitequark/techmap_cmp2lut
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