Add "synth_xilinx -arch"
[yosys.git] / techlibs / xilinx / synth_xilinx.cc
2019-05-07 Clifford WolfAdd "synth_xilinx -arch"
2019-05-06 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-05-03 Eddie HungMerge remote-tracking branch 'origin/master' into cliff...
2019-05-03 Clifford WolfMerge pull request #969 from YosysHQ/clifford/pmgenstuff
2019-05-03 Eddie HungRevert "synth_xilinx to call dffinit with -noreinit"
2019-05-03 Clifford WolfMerge pull request #976 from YosysHQ/clifford/fix974
2019-05-03 Eddie Hungsynth_xilinx to call dffinit with -noreinit
2019-05-02 Clifford WolfMerge pull request #963 from YosysHQ/eddie/synth_xilinx...
2019-05-02 Eddie HungBack to passing all xc7srl tests!
2019-05-02 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-05-01 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-04-30 Clifford WolfMerge pull request #972 from YosysHQ/clifford/fix968
2019-04-30 Clifford WolfMerge pull request #966 from YosysHQ/clifford/fix956
2019-04-30 Clifford WolfMerge pull request #962 from YosysHQ/eddie/refactor_syn...
2019-04-30 Clifford WolfMerge branch 'master' into eddie/refactor_synth_xilinx
2019-04-30 Benedikt TutzerMerge branch 'master' of https://github.com/YosysHQ...
2019-04-29 Clifford WolfMerge pull request #960 from YosysHQ/eddie/equiv_opt_undef
2019-04-28 Eddie HungWIP
2019-04-26 Eddie HungRevert synth_xilinx 'fine' label more to how it used...
2019-04-26 Eddie HungWhere did this check come from!?!
2019-04-26 Eddie HungRefactor synth_xilinx to auto-generate doc
2019-04-22 Eddie HungMerge pull request #914 from YosysHQ/xc7srl
2019-04-22 Eddie HungUpdate help message
2019-04-22 Eddie HungMove 'shregmap -tech xilinx' into map_cells
2019-04-22 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-04-22 Clifford WolfMerge pull request #905 from christian-krieg/feature...
2019-04-22 Clifford WolfMerge pull request #941 from Wren6991/sim_lib_io_clke
2019-04-22 Clifford WolfMerge branch 'master' of https://github.com/dh73/yosys_...
2019-04-22 Clifford WolfRe-added clean after techmap in synth_xilinx
2019-04-22 Clifford WolfMerge pull request #916 from YosysHQ/map_cells_before_m...
2019-04-22 Clifford WolfMerge pull request #911 from mmicko/gowin-nobram
2019-04-22 Clifford WolfMerge pull request #909 from zachjs/master
2019-04-21 Eddie HungTidy up, fix for -nosrl
2019-04-21 Eddie HungMerge branch 'map_cells_before_map_luts' into xc7srl
2019-04-21 Eddie HungMerge branch 'master' into map_cells_before_map_luts
2019-04-21 Eddie HungAdd comments
2019-04-21 Eddie HungUse new pmux2shiftx from #944, remove my old attempt
2019-04-21 Eddie HungMerge remote-tracking branch 'origin/clifford/pmux2shif...
2019-04-21 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-04-20 Clifford WolfMerge pull request #943 from YosysHQ/clifford/whitebox
2019-04-20 Eddie HungMerge remote-tracking branch 'origin/pmux2shiftx' into...
2019-04-20 Eddie HungMerge remote-tracking branch 'origin' into xc7srl
2019-04-20 Clifford WolfMerge pull request #942 from YosysHQ/clifford/fix931
2019-04-18 Eddie HungMerge pull request #917 from YosysHQ/eddie/fix_retime
2019-04-18 Eddie HungRevert "synth_* with -retime option now calls abc with...
2019-04-18 Eddie HungMerge branch 'master' into eddie/fix_retime
2019-04-10 Eddie Hungsynth_* with -retime option now calls abc with -D 1...
2019-04-10 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-04-08 Eddie HungMerge branch 'undo_pr895' into xc7srl
2019-04-06 Eddie HungCall shregmap twice -- once for variable, another for...
2019-04-05 Eddie HungMerge branch 'eddie/fix_retime' into xc7srl
2019-04-05 Eddie HungMove dffinit til after abc
2019-04-05 Eddie HungMerge branch 'eddie/fix_retime' into xc7srl
2019-04-05 Eddie HungMove techamp t:$_DFF_?N? to before abc call
2019-04-05 Eddie HungResolve @daveshah1 comment, update synth_xilinx help
2019-04-05 Eddie Hungsynth_xilinx to techmap FFs after abc call, otherwise...
2019-04-05 Eddie Hungtechmap inside map_cells stage
2019-04-04 Eddie HungMerge branch 'map_cells_before_map_luts' into xc7srl
2019-04-04 Eddie HungMissing techmap entry in help
2019-04-04 Eddie HungMerge branch 'map_cells_before_map_luts' into xc7srl
2019-04-04 Eddie Hungsynth_xilinx to map_cells before map_luts
2019-04-04 Eddie Hungt:$dff* -> t:$dff t:$dffe
2019-04-03 Eddie Hung-nosrl meant when -nobram
2019-04-03 Eddie HungDisable shregmap in synth_xilinx if -retime
2019-04-03 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-28 Benedikt TutzerMerge remote-tracking branch 'origin/master' into featu...
2019-03-25 Eddie Hungsynth_xilinx to use shregmap with -minlen 3
2019-03-25 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-22 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-21 Eddie HungAdd '-nosrl' option to synth_xilinx
2019-03-19 Eddie HungRestore original synth_xilinx commands
2019-03-19 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-19 Clifford WolfMerge pull request #885 from YosysHQ/clifford/fix873
2019-03-19 Clifford WolfAdd Xilinx negedge FFs to synth_xilinx dffinit call...
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger
2019-03-16 Eddie HungCleanup synth_xilinx
2019-03-16 Eddie HungWorking
2019-03-14 Eddie HungMisspell
2019-03-14 Eddie HungRevert "Add shregmap -init_msb_first and use in synth_x...
2019-03-14 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-14 Eddie HungAdd shregmap -init_msb_first and use in synth_xilinx
2019-03-14 Eddie HungMove shregmap until after first techmap
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit
2019-03-05 Clifford WolfMerge pull request #842 from litghost/merge_upstream
2019-03-05 Clifford WolfMerge pull request #850 from daveshah1/ecp5_warn_conflict
2019-03-05 Clifford WolfMerge pull request #851 from kprasadvnsi/master
2019-03-05 Clifford WolfMerge pull request #852 from ucb-bar/firrtlfixes
2019-03-05 Clifford WolfUse "write_edif -pvector bra" for Xilinx EDIF files
2019-03-01 Keith RothmanUse singular for disabling of DRAM or BRAM inference.
2019-03-01 Keith RothmanModify arguments to match existing style.
2019-03-01 Keith RothmanChanges required for VPR place and route synth_xilinx.
2019-02-28 Eddie Hungsynth_xilinx to call shregmap with enable support
2019-02-28 Eddie Hungsynth_xilinx to use shregmap with -params too
2019-02-28 Eddie Hungsynth_xilinx to now have shregmap call after dff2dffe
2019-01-02 Clifford WolfMerge pull request #770 from whitequark/opt_expr_cmp
2019-01-02 Clifford WolfMerge pull request #755 from Icenowy/anlogic-dram-init
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init
2019-01-02 Clifford WolfMerge pull request #773 from whitequark/opt_lut_elim_fixes
2019-01-02 Clifford WolfMerge pull request #772 from whitequark/synth_lut
2019-01-02 Clifford WolfMerge pull request #771 from whitequark/techmap_cmp2lut
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