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Add support for synth_xilinx -abc9 and ignore abc9 -dress opt
[yosys.git] / techlibs / xilinx / synth_xilinx.cc
2019-04-12 Eddie HungAdd support for synth_xilinx -abc9 and ignore abc9... blob | commitdiff | raw
2019-04-08 Eddie HungMerge branch 'master' into xaig blob | commitdiff | raw | diff to current
2019-03-19 Clifford WolfMerge pull request #885 from YosysHQ/clifford/fix873 blob | commitdiff | raw | diff to current
2019-03-19 Clifford WolfAdd Xilinx negedge FFs to synth_xilinx dffinit call... blob | commitdiff | raw | diff to current
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger blob | commitdiff | raw | diff to current
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit blob | commitdiff | raw | diff to current
2019-03-05 Clifford WolfMerge pull request #842 from litghost/merge_upstream blob | commitdiff | raw | diff to current
2019-03-05 Clifford WolfMerge pull request #850 from daveshah1/ecp5_warn_conflict blob | commitdiff | raw | diff to current
2019-03-05 Clifford WolfMerge pull request #851 from kprasadvnsi/master blob | commitdiff | raw | diff to current
2019-03-05 Clifford WolfMerge pull request #852 from ucb-bar/firrtlfixes blob | commitdiff | raw | diff to current
2019-03-05 Clifford WolfUse "write_edif -pvector bra" for Xilinx EDIF files blob | commitdiff | raw | diff to current
2019-03-01 Keith RothmanUse singular for disabling of DRAM or BRAM inference. blob | commitdiff | raw | diff to current
2019-03-01 Keith RothmanModify arguments to match existing style. blob | commitdiff | raw | diff to current
2019-03-01 Keith RothmanChanges required for VPR place and route synth_xilinx. blob | commitdiff | raw | diff to current
2019-01-02 Clifford WolfMerge pull request #770 from whitequark/opt_expr_cmp blob | commitdiff | raw | diff to current
2019-01-02 Clifford WolfMerge pull request #755 from Icenowy/anlogic-dram-init blob | commitdiff | raw | diff to current
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init blob | commitdiff | raw | diff to current
2019-01-02 Clifford WolfMerge pull request #773 from whitequark/opt_lut_elim_fixes blob | commitdiff | raw | diff to current
2019-01-02 Clifford WolfMerge pull request #772 from whitequark/synth_lut blob | commitdiff | raw | diff to current
2019-01-02 Clifford WolfMerge pull request #771 from whitequark/techmap_cmp2lut blob | commitdiff | raw | diff to current
2019-01-02 Clifford WolfMerge pull request #769 from whitequark/typos blob | commitdiff | raw | diff to current
2019-01-02 whitequarkFix typographical and grammatical errors and inconsiste... blob | commitdiff | raw | diff to current
2018-10-19 Clifford WolfMerge pull request #672 from daveshah1/fix_bram blob | commitdiff | raw | diff to current
2018-10-18 Clifford WolfMerge pull request #659 from rubund/sv_interfaces blob | commitdiff | raw | diff to current
2018-10-18 Clifford WolfMerge pull request #657 from mithro/xilinx-vpr blob | commitdiff | raw | diff to current
2018-10-08 Tim 'mithro' Ansellxilinx: Still map LUT7/LUT8 to Xilinx specific primitives. blob | commitdiff | raw | diff to current
2018-09-17 Udi FinkelsteinMerge branch 'master' into pr_reg_wire_error blob | commitdiff | raw | diff to current
2018-08-22 Jim LawsonMerge pull request #1 from YosysHQ/master blob | commitdiff | raw | diff to current
2018-08-18 Aman GoelMerge pull request #3 from YosysHQ/master blob | commitdiff | raw | diff to current
2018-08-15 Clifford WolfMerge pull request #573 from cr1901/msys-64 blob | commitdiff | raw | diff to current
2018-08-15 Clifford WolfMerge pull request #591 from hzeller/virtual-override blob | commitdiff | raw | diff to current
2018-08-15 Clifford WolfMerge pull request #513 from udif/pr_reg_wire_error blob | commitdiff | raw | diff to current
2018-07-21 Henner ZellerConsistent use of 'override' for virtual methods in... blob | commitdiff | raw | diff to current
2018-05-04 Clifford WolfMerge pull request #537 from mithro/yosys-vpr blob | commitdiff | raw | diff to current
2018-04-18 Tim 'mithro' AnsellImproving vpr output support. blob | commitdiff | raw | diff to current
2018-03-07 Clifford WolfAdd Xilinx RAM64X1D and RAM128X1D simulation models blob | commitdiff | raw | diff to current
2016-07-08 Clifford WolfMerge branch 'yosys-0.5-vtr' of https://github.com... blob | commitdiff | raw | diff to current
2016-04-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys blob | commitdiff | raw | diff to current
2016-04-21 Clifford WolfAdded "yosys -D" feature blob | commitdiff | raw | diff to current
2016-03-19 Clifford WolfAdded black box modules for all the 7-series design... blob | commitdiff | raw | diff to current
2016-02-13 Clifford WolfRun dffsr2dff in synth_xilinx blob | commitdiff | raw | diff to current
2016-02-01 Clifford WolfAdded "abc -luts" option, Improved Xilinx logic mapping blob | commitdiff | raw | diff to current
2015-12-07 Clifford WolfMerge pull request #108 from cseed/master blob | commitdiff | raw | diff to current
2015-10-30 Clifford WolfBugfix in Xilinx LUT mapping blob | commitdiff | raw | diff to current
2015-09-25 Clifford WolfAdded read-enable to memory model blob | commitdiff | raw | diff to current
2015-07-02 Clifford WolfFixed trailing whitespaces blob | commitdiff | raw | diff to current
2015-05-26 Clifford WolfAdded output args to synth_ice40 blob | commitdiff | raw | diff to current
2015-04-09 Clifford WolfTowards DRAM support in Xilinx flow blob | commitdiff | raw | diff to current
2015-04-06 Clifford WolfAdded Xilinx bram black-box modules blob | commitdiff | raw | diff to current
2015-04-04 Clifford WolfAdded "dffinit", Support for initialized Xilinx DFF blob | commitdiff | raw | diff to current
2015-04-03 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol... blob | commitdiff | raw | diff to current
2015-02-15 Clifford WolfAdded "stat" to "synth" and "synth_xilinx" blob | commitdiff | raw | diff to current
2015-02-15 Clifford WolfAdded final checks to "synth" and "synth_xilinx" blob | commitdiff | raw | diff to current
2015-02-01 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys blob | commitdiff | raw | diff to current
2015-02-01 Clifford Wolfno support for 6-series xilinx devices blob | commitdiff | raw | diff to current
2015-02-01 Clifford WolfAdded Xilinx example for Basys3 board blob | commitdiff | raw | diff to current
2015-01-18 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys blob | commitdiff | raw | diff to current
2015-01-18 Clifford WolfVarious cleanups in xilinx techlib blob | commitdiff | raw | diff to current
2015-01-17 Clifford WolfAdded synth_xilinx -retime -flatten blob | commitdiff | raw | diff to current
2015-01-17 Clifford WolfAdded MUXCY and XORCY support to synth_xilinx blob | commitdiff | raw | diff to current
2015-01-16 Clifford WolfAdded dff2dffe to synth_xilinx blob | commitdiff | raw | diff to current
2015-01-15 Clifford WolfAdded Xilinx MUXF7 and MUXF8 support blob | commitdiff | raw | diff to current
2015-01-13 Clifford WolfVarious cleanups in synth_xilinx command blob | commitdiff | raw | diff to current
2015-01-06 Clifford WolfVarious small improvements to synth_xilinx blob | commitdiff | raw | diff to current
2015-01-05 Clifford WolfTowards Xilinx bram support blob | commitdiff | raw | diff to current
2014-09-27 Clifford Wolfnamespace Yosys blob | commitdiff | raw | diff to current
2013-11-24 Clifford WolfAdded "techmap -share_map" option blob | commitdiff | raw | diff to current
2013-10-27 Clifford WolfAdded synth_xilinx command blob | commitdiff | raw | diff to current