Merge pull request #2025 from YosysHQ/eddie/frontend_cleanup
[yosys.git] / techlibs / xilinx / xc3sa_brams.txt
2020-04-10 whitequarkMerge pull request #1603 from whitequark/ice40-ram_style
2020-03-27 Claire WolfMerge pull request #1607 from whitequark/simplify-simpl...
2020-03-12 Miodrag MilanovićMerge pull request #1666 from Xiretza/improve-makefile
2020-03-03 Claire WolfMerge pull request #1681 from YosysHQ/eddie/fix1663
2020-03-03 Claire WolfMerge pull request #1519 from YosysHQ/eddie/submod_po
2020-02-20 Claire WolfMerge pull request #1642 from jjj11x/jjj11x/sv-enum
2020-02-13 N. EngelhardtMerge pull request #1679 from thasti/delay-parsing
2020-02-10 Eddie HungMerge pull request #1670 from rodrigomelo9/master
2020-02-10 N. EngelhardtMerge pull request #1669 from thasti/pyosys-attrs
2020-02-07 Eddie HungMerge pull request #1685 from dh73/gowin
2020-02-07 whitequarkMerge pull request #1683 from whitequark/write_verilog...
2020-02-07 Marcin Kościelnickixilinx: Add block RAM mapping for Virtex 2* and Spartan 3*.