$__ABC_REG to have WIDTH parameter
[yosys.git] / techlibs / xilinx / xc6s_brams_bb.v
2019-08-30 Eddie HungMerge branch 'xc7dsp' of github.com:YosysHQ/yosys into...
2019-08-30 David ShahMerge branch 'master' into xc7dsp
2019-08-29 SergeyMerge pull request #3 from YosysHQ/Sergey/tests_ice40
2019-08-28 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_...
2019-08-28 Eddie HungMerge remote-tracking branch 'origin/clifford/async2syn...
2019-08-28 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-28 David ShahMerge pull request #1332 from YosysHQ/dave/ecp5gsr
2019-08-27 Clifford WolfMerge pull request #1325 from YosysHQ/eddie/sat_init
2019-08-27 Eddie HungMerge pull request #1292 from YosysHQ/mwk/xilinx_bufgmap
2019-08-26 Eddie HungMerge branch 'master' into mwk/xilinx_bufgmap
2019-08-26 Clifford WolfMerge tag 'yosys-0.9'
2019-08-25 Clifford WolfMerge pull request #1112 from acw1251/pyosys_sigsig_issue
2019-08-23 Eddie HungMerge branch 'master' into mwk/xilinx_bufgmap
2019-08-23 Eddie HungMerge branch 'master' into mwk/xilinx_bufgmap
2019-08-23 Eddie HungMerge remote-tracking branch 'origin/master' into mwk...
2019-08-16 Eddie HungMerge branch 'eddie/abc9_refactor' into xaig_dff
2019-08-16 Eddie HungMerge remote-tracking branch 'origin/master' into mwk...
2019-08-13 Marcin Kościelnickimove attributes to wires
2019-08-12 Marcin KościelnickiAdd clock buffer insertion pass, improve iopadmap.
2019-07-24 Jim LawsonMerge remote-tracking branch 'upstream/master'
2019-07-15 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-07-15 Eddie HungMerge branch 'master' into eddie/fix1178
2019-07-14 Eddie HungMerge pull request #1194 from cr1901/miss-semi
2019-07-12 Clifford WolfMerge pull request #1183 from whitequark/ice40-always...
2019-07-11 Eddie HungMerge pull request #1182 from koriakin/xc6s-bram
2019-07-11 Marcin Kościelnickisynth_xilinx: Initial Spartan 6 block RAM inference...