projects / yosys.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
Add "scratchpad" to CHANGELOG
[yosys.git] / techlibs / xilinx /
2019-12-18 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys tree | commitdiff
2019-12-18 David ShahMerge pull request #1563 from YosysHQ/dave/async-prld tree | commitdiff
2019-12-18 Eddie HungMerge pull request #1572 from nakengelhardt/scratchpad_pass tree | commitdiff
2019-12-18 Marcin Kościelnickixilinx: Add xilinx_dffopt pass (#1557) tree | commitdiff
2019-12-18 Marcin Kościelnickixilinx: Improve flip-flop handling. tree | commitdiff
2019-12-17 Eddie HungMerge pull request #1574 from YosysHQ/eddie/xilinx_lutram tree | commitdiff
2019-12-17 Eddie HungMerge pull request #1521 from dh73/diego/memattr tree | commitdiff
2019-12-16 Eddie HungAdd unconditional match blocks for force RAM tree | commitdiff
2019-12-16 Eddie HungUpdate xc7/xcu bram rules tree | commitdiff
2019-12-16 Eddie HungMerge branch 'diego/memattr' of https://github.com... tree | commitdiff
2019-12-16 Eddie HungMerge branch 'eddie/xilinx_lutram' of github.com:YosysH... tree | commitdiff
2019-12-16 Eddie HungPopulate DID/DOD even if unused tree | commitdiff
2019-12-16 Eddie HungRename *RAM{32,64}M rules to RAM{32X2,64X1}Q tree | commitdiff
2019-12-16 Diego HRemoving fixed attribute value to !ramstyle rules tree | commitdiff
2019-12-16 Diego HMerging attribute rules into a single match block;... tree | commitdiff
2019-12-16 Eddie HungMerge pull request #1575 from rodrigomelo9/master tree | commitdiff
2019-12-16 Eddie HungMerge pull request #1577 from gromero/for-yosys tree | commitdiff
2019-12-13 Diego HRefactoring memory attribute matching based on IEEE... tree | commitdiff
2019-12-13 Eddie HungMerge pull request #1533 from dh73/bram_xilinx tree | commitdiff
2019-12-13 Eddie HungDisable RAM16X1D match rule; carry-over from LUT4 arches tree | commitdiff
2019-12-13 Eddie HungRAM64M8 to also have [5:0] for address tree | commitdiff
2019-12-13 Eddie HungAdd RAM32X6SDP and RAM64X3SDP modes tree | commitdiff
2019-12-13 Eddie HungFix RAM64M model to have 6 bit address bus tree | commitdiff
2019-12-13 Eddie HungAdd memory rules for RAM16X1D, RAM32M, RAM64M tree | commitdiff
2019-12-12 Diego HFixing citation in xc7_xcu_brams.txt file. Fixing RAMB3... tree | commitdiff
2019-12-12 Eddie Hungabc9_map.v: fix Xilinx LUTRAM tree | commitdiff
2019-12-12 Diego HUpdating RAMB36E1 thresholds. Adding test for both... tree | commitdiff
2019-12-12 Diego HMerge https://github.com/YosysHQ/yosys into bram_xilinx tree | commitdiff
2019-12-10 Eddie HungMerge pull request #1545 from YosysHQ/eddie/ice40_wrapc... tree | commitdiff
2019-12-05 Clifford WolfMerge pull request #1551 from whitequark/manual-cell... tree | commitdiff
2019-12-04 Marcin Kościelnickixilinx: Add tristate buffer mapping. (#1528) tree | commitdiff
2019-12-04 Marcin Kościelnickixilinx: Add models for LUTRAM cells. (#1537) tree | commitdiff
2019-12-03 Clifford WolfMerge pull request #1524 from pepijndevos/gowindffinit tree | commitdiff
2019-12-02 Clifford WolfMerge pull request #1539 from YosysHQ/mwk/ilang-bounds... tree | commitdiff
2019-11-29 Miodrag MilanovićMerge pull request #1540 from YosysHQ/mwk/xilinx-bufpll tree | commitdiff
2019-11-29 Marcin Kościelnickixilinx: Add missing blackbox cell for BUFPLL. tree | commitdiff
2019-11-27 Diego HAdjusting Vivado's BRAM min bits threshold for RAMB18E1 tree | commitdiff
2019-11-27 Clifford WolfMerge pull request #1501 from YosysHQ/dave/mem_copy_attr tree | commitdiff
2019-11-26 Marcin Kościelnickixilinx: Add simulation models for IOBUF and OBUFT. tree | commitdiff
2019-11-25 Marcin Kościelnickiclkbufmap: Add support for inverters in clock path. tree | commitdiff
2019-11-25 Marcin Kościelnickixilinx: Use INV instead of LUT1 when applicable tree | commitdiff
2019-11-19 Clifford WolfMerge pull request #1449 from pepijndevos/gowin tree | commitdiff
2019-11-19 Marcin Kościelnickixilinx: Add simulation models for MULT18X18* and DSP48A*. tree | commitdiff
2019-11-14 Clifford WolfMerge pull request #1444 from btut/feature/python_wrapp... tree | commitdiff
2019-11-14 Clifford WolfMerge pull request #1465 from YosysHQ/dave/ice40_timing_sim tree | commitdiff
2019-11-11 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ... tree | commitdiff
2019-11-10 Clifford WolfMerge pull request #1470 from YosysHQ/clifford/subpassdoc tree | commitdiff
2019-11-06 Marcin Kościelnickisynth_xilinx: Merge blackbox primitive libraries. tree | commitdiff
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog... tree | commitdiff
2019-10-24 David ShahMerge pull request #1455 from YosysHQ/dave/ultrascaleplus tree | commitdiff
2019-10-23 David Shahxilinx: Add URAM288 mapping for xcup tree | commitdiff
2019-10-23 David Shahxilinx: Add support for UltraScale[+] BRAM mapping tree | commitdiff
2019-10-22 Marcin Kościelnickixilinx: Support multiplier mapping for all families. tree | commitdiff
2019-10-22 Clifford WolfMerge pull request #1452 from nakengelhardt/fix_dsp_mem_reg tree | commitdiff
2019-10-21 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ... tree | commitdiff
2019-10-19 Miodrag MilanovićMerge pull request #1457 from xobs/python-binary-name tree | commitdiff
2019-10-19 Sean CrossMakefile: don't assume python is called `python3` tree | commitdiff
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/efinix tree | commitdiff
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/anlogic tree | commitdiff
2019-10-18 Miodrag MilanovićMerge branch 'master' into eddie/pr1352 tree | commitdiff
2019-10-17 N. EngelhardtCall memory_dff before DSP mapping to reserve registers... tree | commitdiff
2019-10-15 Benedikt TutzerMerge branch 'master' of https://github.com/YosysHQ... tree | commitdiff
2019-10-14 Clifford WolfUse "(id)" instead of "id" for types as temporary hack tree | commitdiff
2019-10-10 Miodrag MilanovićMerge pull request #1445 from YosysHQ/mwk/xilinx_ibufg tree | commitdiff
2019-10-10 Marcin Kościelnickixilinx: Add simulation model for IBUFG. tree | commitdiff
2019-10-08 Eddie HungMerge pull request #1432 from YosysHQ/eddie/fix1427 tree | commitdiff
2019-10-08 Eddie HungMerge pull request #1433 from YosysHQ/eddie/equiv_opt_a... tree | commitdiff
2019-10-08 Eddie HungMerge pull request #1437 from YosysHQ/eddie/abc_to_abc9 tree | commitdiff
2019-10-08 Eddie HungMerge pull request #1438 from YosysHQ/eddie/xilinx_dsp_... tree | commitdiff
2019-10-05 Miodrag MilanovićMerge pull request #1436 from YosysHQ/mmicko/msvc_fix tree | commitdiff
2019-10-05 Eddie HungAdd comment on why partial multipliers are 18x18 tree | commitdiff
2019-10-05 Eddie HungFix typo in check_label() tree | commitdiff
2019-10-05 Eddie HungMerge branch 'master' into eddie/abc_to_abc9 tree | commitdiff
2019-10-05 Eddie HungAdd temporary `abc9 -nomfs` and use for `synth_xilinx... tree | commitdiff
2019-10-05 Eddie HungRemove DSP48E1 from *_cells_xtra.v tree | commitdiff
2019-10-04 Eddie HungRename abc_* names/attributes to more precisely be... tree | commitdiff
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/efinix tree | commitdiff
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/anlogic tree | commitdiff
2019-09-30 Eddie HungMerge branch 'SergeyDegtyar/ecp5' of https://github... tree | commitdiff
2019-09-30 whitequarkMerge pull request #1406 from whitequark/connect_rpc tree | commitdiff
2019-09-30 Eddie HungMerge pull request #1397 from btut/fix/python_wrappers_... tree | commitdiff
2019-09-30 Miodrag MilanovićMerge pull request #1416 from YosysHQ/mmicko/frontend_b... tree | commitdiff
2019-09-30 Clifford WolfMerge pull request #1412 from YosysHQ/eddie/equiv_opt_a... tree | commitdiff
2019-09-30 Eddie HungAdd LDCE/LDPE sim library, remove from *cells_xtra... tree | commitdiff
2019-09-30 Marcin Kościelnickisynth_xilinx: Support latches, remove used-up FF init... tree | commitdiff
2019-09-30 Eddie HungMerge pull request #1414 from hzeller/improve-replace... tree | commitdiff
2019-09-29 Eddie HungMerge pull request #1359 from YosysHQ/xc7dsp tree | commitdiff
2019-09-29 Clifford WolfMerge pull request #1411 from aman-goel/YosysHQ-master tree | commitdiff
2019-09-28 Eddie HungFix box name tree | commitdiff
2019-09-27 Eddie HungRe-order tree | commitdiff
2019-09-27 Aman GoelMerge pull request #7 from YosysHQ/master tree | commitdiff
2019-09-27 Clifford WolfMerge pull request #1404 from YosysHQ/fix_gzip_macos tree | commitdiff
2019-09-26 Eddie HungMissing an '&' tree | commitdiff
2019-09-26 Eddie HungTypo tree | commitdiff
2019-09-26 Eddie Hungselect once tree | commitdiff
2019-09-26 Eddie HungStop trying to be too smart by prematurely optimising tree | commitdiff
2019-09-25 Eddie HungMerge pull request #1401 from SergeyDegtyar/SergeyDegty... tree | commitdiff
2019-09-25 Eddie HungCall 'wreduce' after mul2dsp to avoid unextend() tree | commitdiff
2019-09-25 Eddie HungOops. Actually use __NAME__ in ABC_DSP48E1 macro tree | commitdiff
2019-09-24 Eddie HungAdd (* techmap_autopurge *) to abc_unmap.v too tree | commitdiff
next