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Merge remote-tracking branch 'origin/master' into xaig_dff
[yosys.git] / techlibs /
2019-11-19 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff tree | commitdiff
2019-11-19 Clifford WolfMerge pull request #1449 from pepijndevos/gowin tree | commitdiff
2019-11-19 Pepijn de VosRemove dff init altogether tree | commitdiff
2019-11-19 Marcin Kościelnickixilinx: Add simulation models for MULT18X18* and DSP48A*. tree | commitdiff
2019-11-18 Pepijn de Vosadd help for nowidelut and abc9 options tree | commitdiff
2019-11-18 whitequarkMerge pull request #1494 from whitequark/write_verilog... tree | commitdiff
2019-11-17 Clifford WolfMerge pull request #1492 from YosysHQ/dave/wreduce... tree | commitdiff
2019-11-16 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ... tree | commitdiff
2019-11-15 David Shahecp5: Use new autoname pass for better cell/net names tree | commitdiff
2019-11-14 Clifford WolfMerge pull request #1490 from YosysHQ/clifford/autoname tree | commitdiff
2019-11-14 Clifford WolfMerge pull request #1444 from btut/feature/python_wrapp... tree | commitdiff
2019-11-14 Clifford WolfMerge pull request #1465 from YosysHQ/dave/ice40_timing_sim tree | commitdiff
2019-11-14 Clifford WolfMerge branch 'label-bads-btor' of https://github.com... tree | commitdiff
2019-11-13 Clifford WolfAdd "autoname" pass and use it in "synth_ice40" tree | commitdiff
2019-11-13 whitequarkMerge pull request #1488 from whitequark/flowmap-fixes tree | commitdiff
2019-11-12 Clifford WolfMerge pull request #1484 from YosysHQ/clifford/cmp2luteqne tree | commitdiff
2019-11-11 Pepijn de Vosfix fsm test with proper clock enable polarity tree | commitdiff
2019-11-11 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ... tree | commitdiff
2019-11-11 Clifford WolfDo not map $eq and $ne in cmp2lut, only proper arithmet... tree | commitdiff
2019-11-10 Clifford WolfMerge pull request #1470 from YosysHQ/clifford/subpassdoc tree | commitdiff
2019-11-06 Pepijn de Vosfix wide luts tree | commitdiff
2019-11-06 Marcin Kościelnickisynth_xilinx: Merge blackbox primitive libraries. tree | commitdiff
2019-10-28 Pepijn de Vosadd IOBUF tree | commitdiff
2019-10-28 Pepijn de Vosadd tristate buffer and test tree | commitdiff
2019-10-28 Pepijn de VosMore formatting tree | commitdiff
2019-10-28 Pepijn de Vosreally really fix formatting maybe tree | commitdiff
2019-10-28 Pepijn de Vosundo formatting fuckup tree | commitdiff
2019-10-28 Pepijn de Vosadd wide luts tree | commitdiff
2019-10-28 Pepijn de Vosadd 32-bit BRAM and byte-enables tree | commitdiff
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog... tree | commitdiff
2019-10-24 Pepijn de VosALU sim tweaks tree | commitdiff
2019-10-24 David ShahMerge pull request #1455 from YosysHQ/dave/ultrascaleplus tree | commitdiff
2019-10-23 David Shahice40: Add post-pnr ICESTORM_RAM model and fix FFs tree | commitdiff
2019-10-23 David Shahice40: Support for post-pnr timing simulation tree | commitdiff
2019-10-23 David Shahxilinx: Add URAM288 mapping for xcup tree | commitdiff
2019-10-23 David Shahxilinx: Add support for UltraScale[+] BRAM mapping tree | commitdiff
2019-10-22 Marcin Kościelnickixilinx: Support multiplier mapping for all families. tree | commitdiff
2019-10-22 Clifford WolfMerge pull request #1452 from nakengelhardt/fix_dsp_mem_reg tree | commitdiff
2019-10-21 Pepijn de Vosadd a few more missing dff tree | commitdiff
2019-10-21 Pepijn de Vosadd negedge DFF tree | commitdiff
2019-10-21 Pepijn de Vosuse ADDSUB ALU mode to remove inverters tree | commitdiff
2019-10-21 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ... tree | commitdiff
2019-10-20 David Shahecp5: Pass -nomfs to abc9 tree | commitdiff
2019-10-19 Miodrag MilanovićMerge pull request #1457 from xobs/python-binary-name tree | commitdiff
2019-10-19 Sean CrossMakefile: don't assume python is called `python3` tree | commitdiff
2019-10-18 Miodrag MilanovićMerge pull request #1435 from YosysHQ/mmicko/efinix tree | commitdiff
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/efinix tree | commitdiff
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/anlogic tree | commitdiff
2019-10-18 Miodrag MilanovićMerge branch 'master' into eddie/pr1352 tree | commitdiff
2019-10-17 N. EngelhardtCall memory_dff before DSP mapping to reserve registers... tree | commitdiff
2019-10-16 Pepijn de Vosremove duplicate DFFR tree | commitdiff
2019-10-15 Benedikt TutzerMerge branch 'master' of https://github.com/YosysHQ... tree | commitdiff
2019-10-14 Clifford WolfMerge pull request #1448 from YosysHQ/daveshah1-sv... tree | commitdiff
2019-10-14 David ShahMerge pull request #1446 from YosysHQ/dave/ecp5-ioff tree | commitdiff
2019-10-14 Clifford WolfUse "(id)" instead of "id" for types as temporary hack tree | commitdiff
2019-10-11 David Shahecp5: Add ECLKBRIDGECS blackbox tree | commitdiff
2019-10-10 David Shahecp5: Add attrmvcp to copy syn_useioff to driving FF tree | commitdiff
2019-10-10 David Shahecp5: Set syn_useioff on IO FFs to enable packing tree | commitdiff
2019-10-10 Miodrag MilanovićMerge pull request #1445 from YosysHQ/mwk/xilinx_ibufg tree | commitdiff
2019-10-10 Marcin Kościelnickixilinx: Add simulation model for IBUFG. tree | commitdiff
2019-10-08 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff tree | commitdiff
2019-10-08 Eddie HungMerge pull request #1432 from YosysHQ/eddie/fix1427 tree | commitdiff
2019-10-08 Eddie HungMerge pull request #1433 from YosysHQ/eddie/equiv_opt_a... tree | commitdiff
2019-10-08 Eddie HungMerge pull request #1437 from YosysHQ/eddie/abc_to_abc9 tree | commitdiff
2019-10-08 Eddie HungMerge pull request #1438 from YosysHQ/eddie/xilinx_dsp_... tree | commitdiff
2019-10-07 Eddie HungCleanup tree | commitdiff
2019-10-07 Eddie HungRename $currQ to $abc9_currQ tree | commitdiff
2019-10-07 Eddie HungUpdate comments in abc9_map.v tree | commitdiff
2019-10-07 Eddie HungRemove -D_ABC9 tree | commitdiff
2019-10-06 Eddie HungDo not require changes to cells_sim.v; try and work... tree | commitdiff
2019-10-05 Miodrag MilanovićMerge pull request #1436 from YosysHQ/mmicko/msvc_fix tree | commitdiff
2019-10-05 Eddie HungAdd comment on why partial multipliers are 18x18 tree | commitdiff
2019-10-05 Eddie HungFix typo in check_label() tree | commitdiff
2019-10-05 Eddie Hungabc -> abc9 tree | commitdiff
2019-10-05 Eddie HungMerge branch 'master' into eddie/abc_to_abc9 tree | commitdiff
2019-10-05 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff tree | commitdiff
2019-10-05 Eddie HungAdd temporary `abc9 -nomfs` and use for `synth_xilinx... tree | commitdiff
2019-10-05 Eddie HungUse read_args for read_verilog tree | commitdiff
2019-10-05 Eddie HungRemove DSP48E1 from *_cells_xtra.v tree | commitdiff
2019-10-05 Eddie HungFix merge issues tree | commitdiff
2019-10-04 Eddie HungMerge remote-tracking branch 'origin/eddie/abc_to_abc9... tree | commitdiff
2019-10-04 Eddie HungRename abc_* names/attributes to more precisely be... tree | commitdiff
2019-10-04 Eddie HungPanic over. Model was elsewhere. Re-arrange for consistency tree | commitdiff
2019-10-04 Eddie HungOops tree | commitdiff
2019-10-04 Eddie HungOhmilord this wasn't added all this time!?! tree | commitdiff
2019-10-04 Miodrag MilanovicFF should be initialized to 0 tree | commitdiff
2019-10-04 Miodrag MilanovicAdd missing latch mapping tree | commitdiff
2019-10-04 Miodrag MilanovicMerge branch 'SergeyDegtyar/efinix' of https://github... tree | commitdiff
2019-10-04 Miodrag MilanovicMerge branch 'SergeyDegtyar/anlogic' of https://github... tree | commitdiff
2019-10-03 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff tree | commitdiff
2019-10-03 Eddie HungEnglish tree | commitdiff
2019-10-03 Clifford WolfMerge pull request #1419 from YosysHQ/eddie/lazy_derive tree | commitdiff
2019-10-03 Clifford WolfMerge pull request #1422 from YosysHQ/eddie/aigmap_select tree | commitdiff
2019-10-03 Clifford WolfMerge pull request #1429 from YosysHQ/clifford/checkmapped tree | commitdiff
2019-10-03 David ShahMerge pull request #1425 from YosysHQ/dave/ecp5_pdp16 tree | commitdiff
2019-10-01 Eddie HungMore fixes tree | commitdiff
2019-10-01 Eddie HungEscape Verilog identifiers for legality outside of... tree | commitdiff
2019-10-01 David Shahecp5: Fix shuffle_enable port tree | commitdiff
2019-10-01 David Shahecp5: Add support for mapping 36-bit wide PDP BRAMs tree | commitdiff
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/efinix tree | commitdiff
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