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added prefix to FDirection constants, fixing windows build
[yosys.git]
/
techlibs
/
2018-09-14
Clifford Wolf
Merge pull request #625 from aman-goel/master
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commitdiff
2018-09-10
Clifford Wolf
Add iCE40 SB_SPRAM256KA simulation model
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commitdiff
2018-08-22
Jim Lawson
Merge pull request #1 from YosysHQ/master
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commitdiff
2018-08-18
Aman Goel
Merge pull request #3 from YosysHQ/master
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commitdiff
2018-08-15
Clifford Wolf
Merge pull request #573 from cr1901/msys-64
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commitdiff
2018-08-15
Clifford Wolf
Merge pull request #591 from hzeller/virtual-override
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commitdiff
2018-08-15
Clifford Wolf
Merge pull request #576 from cr1901/no-resource
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commitdiff
2018-08-15
Clifford Wolf
Merge pull request #513 from udif/pr_reg_wire_error
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commitdiff
2018-08-15
Clifford Wolf
Merge pull request #562 from udif/pr_fix_illegal_port_decl
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commitdiff
2018-07-21
Henner Zeller
Consistent use of 'override' for virtual methods in...
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commitdiff
2018-07-18
Aman Goel
Merge pull request #2 from YosysHQ/master
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commitdiff
2018-07-16
Clifford Wolf
Merge pull request #581 from daveshah1/ecp5
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commitdiff
2018-07-16
David Shah
ecp5: Fixing miscellaneous sim model issues
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commitdiff
2018-07-16
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys
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commitdiff
2018-07-16
David Shah
ecp5: Fixing 'X' issues with LUT simulation models
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commitdiff
2018-07-16
David Shah
ecp5: ECP5 synthesis fixes
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commitdiff
2018-07-14
David Shah
ecp5: Adding synchronous set/reset support
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commitdiff
2018-07-13
David Shah
ecp5: Add DRAM match rule
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commitdiff
2018-07-13
David Shah
ecp5: Cells and mappings fixes
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commitdiff
2018-07-13
David Shah
ecp5: Fixing arith_map
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commitdiff
2018-07-13
David Shah
ecp5: Initial arith_map implementation
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commitdiff
2018-07-13
David Shah
ecp5: Adding basic synth_ecp5 based on synth_ice40
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commitdiff
2018-07-13
David Shah
ecp5: Adding DFF maps
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commitdiff
2018-07-13
Clifford Wolf
Merge pull request #580 from daveshah1/ice40_nx
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commitdiff
2018-07-13
David Shah
ecp5: Adding DRAM map
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commitdiff
2018-07-13
David Shah
ecp5: Adding basic cells_sim and mapper for LUTs up...
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commitdiff
2018-07-13
David Shah
ice40: Add CIN_CONST and CIN_SET parameters to ICESTORM_LC
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commitdiff
2018-07-04
Aman Goel
Merge branch 'YosysHQ-master'
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commitdiff
2018-07-04
Aman Goel
Merging with official repo
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commitdiff
2018-06-13
Clifford Wolf
Add "synth_ice40 -json"
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commitdiff
2018-06-11
Clifford Wolf
Fix ice40_opt for cases where a port is connected to...
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commitdiff
2018-05-30
Clifford Wolf
Make -nordff the default in "prep"
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commitdiff
2018-05-17
Clifford Wolf
Merge pull request #550 from jimparis/yosys-upstream
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commitdiff
2018-05-17
Clifford Wolf
Merge pull request #551 from olofk/ice40_cells_sim_ports
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commitdiff
2018-05-17
Olof Kindgren
Avoid mixing module port declaration styles in ice40...
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commitdiff
2018-05-04
Clifford Wolf
Merge pull request #537 from mithro/yosys-vpr
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commitdiff
2018-04-30
Clifford Wolf
Add "synth_intel --noiopads"
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commitdiff
2018-04-18
Tim 'mithro' Ansell
Improving vpr output support.
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commitdiff
2018-04-18
Tim 'mithro' Ansell
synth_ice40: Rework the vpr blif output slightly.
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commitdiff
2018-04-16
Clifford Wolf
Add "synth_ice40 -nodffe"
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commitdiff
2018-04-01
Clifford Wolf
Merge pull request #522 from c60k28/master
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commitdiff
2018-04-01
c60k28
Fixed broken Quartus backend on dffeas init value ...
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commitdiff
2018-03-31
Clifford Wolf
Merge pull request #521 from azonenberg/for_clifford
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commitdiff
2018-03-31
Robert Ou
coolrunner2: Add an ANDTERM/XOR between chained FFs
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commitdiff
2018-03-31
Robert Ou
coolrunner2: Split multi-bit nets
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commitdiff
2018-03-31
Robert Ou
coolrunner2: Add extraction for TFFs
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commitdiff
2018-03-11
Larry Doolittle
Squelch trailing whitespace, including meta-whitespace
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commitdiff
2018-03-07
Clifford Wolf
Add Xilinx RAM64X1D and RAM128X1D simulation models
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commitdiff
2018-03-04
Clifford Wolf
Add "synth -noshare"
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commitdiff
2018-02-23
Clifford Wolf
Merge branch 'forall'
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commitdiff
2018-02-23
Clifford Wolf
Add $allconst and $allseq cell types
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commitdiff
2018-02-03
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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commitdiff
2018-02-03
Clifford Wolf
Merge pull request #488 from azonenberg/for_clifford
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commitdiff
2018-01-18
Robert Ou
coolrunner2: Move LOC attributes onto the IO cells
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commitdiff
2018-01-09
Clifford Wolf
Add "dffinit -highlow" and fix synth_intel
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commitdiff
2017-12-19
Clifford Wolf
Fix minor typo in "prep" help message
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commitdiff
2017-12-14
Clifford Wolf
Merge branch 'master' into btor-ng
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commitdiff
2017-12-13
Clifford Wolf
Merge pull request #468 from grahamedgecombe/fix-sb...
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commitdiff
2017-12-10
Graham Edgecombe
Fix port names in SB_IO_OD
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commitdiff
2017-12-10
Graham Edgecombe
Remove trailing comma from SB_IO_OD port list
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commitdiff
2017-12-09
Clifford Wolf
Merge branch 'master' into btor-ng
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commitdiff
2017-12-09
Clifford Wolf
Merge pull request #467 from mithro/patch-1
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commitdiff
2017-12-09
Tim Ansell
Fix spelling in -vpr help for synth_ice40
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commitdiff
2017-12-01
Clifford Wolf
Merge branch 'master' into btor-ng
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commitdiff
2017-11-28
Clifford Wolf
Merge pull request #462 from daveshah1/up5k
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commitdiff
2017-11-28
David Shah
Add remaining UltraPlus cells to ice40 techlib
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commitdiff
2017-11-24
Clifford Wolf
Merge pull request #446 from mithro/travis-rework
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commitdiff
2017-11-23
Clifford Wolf
Merge branch 'master' into btor-ng
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commitdiff
2017-11-23
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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commitdiff
2017-11-18
Clifford Wolf
Merge pull request #455 from daveshah1/up5k
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commitdiff
2017-11-18
David Shah
Remove unnecessary keep attributes
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commitdiff
2017-11-18
Clifford Wolf
Merge pull request #452 from cr1901/master
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commitdiff
2017-11-18
Clifford Wolf
Merge pull request #453 from dh73/master
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commitdiff
2017-11-17
David Shah
Merge branch 'master' into up5k
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commitdiff
2017-11-16
Clifford Wolf
Add "synth_ice40 -vpr"
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commitdiff
2017-11-16
David Shah
Add some UltraPlus cells to ice40 techlib
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commitdiff
2017-11-09
dh73
Initial Cyclone 10 support
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commitdiff
2017-11-09
dh73
Merge https://github.com/cliffordwolf/yosys
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commitdiff
2017-11-09
dh73
Organizing Speedster file names
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commitdiff
2017-10-10
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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commitdiff
2017-10-05
Larry Doolittle
Clean whitespace and permissions in techlibs/intel
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commitdiff
2017-10-03
Clifford Wolf
Merge branch 'pr_ast_const_funcs' of https://github...
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commitdiff
2017-10-03
Clifford Wolf
Merge branch 'fix_shift_reduce_conflict' of https:...
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commitdiff
2017-10-03
Clifford Wolf
Merge branch 'dh73-master'
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commitdiff
2017-10-03
Clifford Wolf
Rename "write_verilog -nobasenradix" to "write_verilog...
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commitdiff
2017-10-02
dh73
Tested and working altsyncarm without init files
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commitdiff
2017-10-01
dh73
Adding Cyclone IV (E, GX), Arria 10, Cyclone V and...
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commitdiff
2017-09-29
Clifford Wolf
Add first draft of eASIC back-end
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commitdiff
2017-09-29
Clifford Wolf
Fix synth_ice40 doc regarding -top default
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commitdiff
2017-09-14
Clifford Wolf
Merge pull request #412 from azonenberg/reduce-fixes
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commitdiff
2017-09-14
Clifford Wolf
Merge pull request #411 from azonenberg/counter-extract...
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commitdiff
2017-09-14
Andrew Zonenberg
Added RESET_TO_MAX parameter to $__COUNT_ cell. Cannot...
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commitdiff
2017-09-14
Andrew Zonenberg
Initial support for extraction of counters with clock...
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commitdiff
2017-09-02
Clifford Wolf
Merge pull request #406 from azonenberg/coolrunner...
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commitdiff
2017-09-02
Clifford Wolf
Merge pull request #405 from azonenberg/gpak-refactoring
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commitdiff
2017-09-01
Robert Ou
coolrunner2: Finish fixing special-use p-terms
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commitdiff
2017-09-01
Robert Ou
coolrunner2: Generate a feed-through AND term when...
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commitdiff
2017-09-01
Robert Ou
coolrunner2: Initial fixes for special p-terms
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commitdiff
2017-09-01
Robert Ou
coolrunner2: Fix mapping of flip-flops
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commitdiff
2017-09-01
Robert Ou
coolrunner2: Combine some for loops together
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