examples/anlogic/ now also output the SVF file.
[yosys.git] / techlibs /
2019-03-05 Clifford WolfMerge pull request #842 from litghost/merge_upstream
2019-03-05 Clifford WolfMerge pull request #850 from daveshah1/ecp5_warn_conflict
2019-03-05 Clifford WolfMerge pull request #851 from kprasadvnsi/master
2019-03-05 Clifford WolfMerge pull request #852 from ucb-bar/firrtlfixes
2019-03-05 Clifford WolfUse "write_edif -pvector bra" for Xilinx EDIF files
2019-03-04 Keith RothmanRevert BRAM WRITE_MODE changes.
2019-03-04 David Shahecp5: Demote conflicting FF init values to a warning
2019-03-01 Keith RothmanRevert FF models to include IS_x_INVERTED parameters.
2019-03-01 Keith RothmanUse singular for disabling of DRAM or BRAM inference.
2019-03-01 Keith RothmanModify arguments to match existing style.
2019-03-01 Keith RothmanChanges required for VPR place and route synth_xilinx.
2019-03-01 Clifford WolfMerge pull request #841 from mmicko/master
2019-03-01 Miodrag MilanovicFix ECP5 cells_sim for iverilog
2019-03-01 Clifford WolfMerge pull request #836 from elmsfu/ice40_2bit_ram_rw_mode
2019-03-01 Elmsice40: use 2 bits for READ/WRITE MODE for SB_RAM map
2019-02-28 Larry DoolittleReduce amount of trailing whitespace in code base
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve
2019-02-28 Clifford WolfMerge pull request #827 from ucb-bar/firrtlfixes
2019-02-26 Larry Doolittletechlibs/greenpak4/cells_map.v: Harmonize whitespace...
2019-02-26 Larry DoolittleClean up some whitepsace outliers
2019-02-25 David Shahecp5: Compatibility with Migen AsyncResetSynchronizer
2019-02-24 Clifford WolfMerge pull request #812 from ucb-bar/arrayhierarchyfixes
2019-02-24 Clifford WolfMerge pull request #824 from litghost/fix_reduce_on_ff
2019-02-22 Clifford WolfMerge pull request #819 from YosysHQ/clifford/optd
2019-02-22 Clifford WolfMerge pull request #820 from YosysHQ/clifford/fix810
2019-02-22 Clifford WolfMerge pull request #740 from daveshah1/improve_dress
2019-02-21 Clifford WolfMerge pull request #818 from YosysHQ/clifford/dffsrfix
2019-02-21 Clifford WolfMerge pull request #786 from YosysHQ/pmgen
2019-02-21 Clifford WolfBugfix in ice40_dsp
2019-02-20 Clifford WolfAdd ice40 test_dsp_map test case generator
2019-02-20 Clifford WolfAdd "synth_ice40 -dsp"
2019-02-20 Clifford WolfImprove iCE40 SB_MAC16 model
2019-02-19 David Shahecp5: Add DDRDLLA
2019-02-19 David Shahecp5: Add DELAYF/DELAYG blackboxes
2019-02-19 Clifford WolfAdd first draft of functional SB_MAC16 model
2019-02-17 Eddie HungRevert "Add INIT parameter to all ff/latch cells"
2019-02-17 Eddie HungMerge https://github.com/YosysHQ/yosys into dff_init
2019-02-17 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-02-13 David Shahecp5: Add ECLKSYNCB blackbox
2019-02-12 David Shahecp5: Full set of IO-related blackboxes
2019-02-06 Eddie HungCope WIDTH of ff/latch cells is default of zero
2019-02-06 Eddie HungAdd INIT parameter to all ff/latch cells
2019-02-06 David Shahecp5: Use abc -dress
2019-02-06 David Shahice40: Use abc -dress in synth_ice40
2019-01-27 Clifford WolfMerge pull request #798 from mmicko/master
2019-01-25 Miodrag MilanovicFixed Anlogic simulation model
2019-01-22 David Shahecp5: Support for flipflop initialisation
2019-01-21 David Shahecp5: Add LSRMODE to flipflops for PRLD support
2019-01-21 David Shahecp5: More blackboxes
2019-01-21 David Shahecp5: Increase threshold for ALU mapping
2019-01-17 Clifford WolfAdd SF2 IO buffer insertion
2019-01-17 Clifford WolfAdd "synth_sf2 -vlog", fix "synth_sf2 -edif"
2019-01-07 Clifford WolfMerge pull request #782 from whitequark/flowmap_dfs
2019-01-04 Clifford WolfMerge pull request #777 from mmicko/achronix_cell_sim_fix
2019-01-04 Miodrag MilanovicFix cells_sim.v for Achronix FPGA
2019-01-04 Clifford WolfMerge pull request #776 from mmicko/unify_noflatten
2019-01-04 Miodrag MilanovicUnify usage of noflatten among architectures
2019-01-02 Clifford WolfMerge pull request #770 from whitequark/opt_expr_cmp
2019-01-02 Clifford WolfMerge pull request #755 from Icenowy/anlogic-dram-init
2019-01-02 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init
2019-01-02 Clifford WolfMerge pull request #773 from whitequark/opt_lut_elim_fixes
2019-01-02 Clifford WolfMerge pull request #772 from whitequark/synth_lut
2019-01-02 Clifford WolfMerge pull request #771 from whitequark/techmap_cmp2lut
2019-01-02 Clifford WolfMerge pull request #769 from whitequark/typos
2019-01-02 whitequarkFix typographical and grammatical errors and inconsiste...
2019-01-02 whitequarksynth_ice40: use 4-LUT coarse synthesis mode.
2019-01-02 whitequarksynth: add k-LUT mode.
2019-01-02 whitequarksynth: improve script documentation. NFC.
2019-01-02 whitequarkcmp2lut: new techmap pass.
2018-12-31 Clifford WolfMerge pull request #766 from Icenowy/anlogic-latches
2018-12-29 Larry DoolittleFix 7 instances of add_share_file to add_gen_share_file
2018-12-25 Icenowy Zhenganlogic: add latch cells
2018-12-23 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
2018-12-22 Clifford WolfMerge pull request #757 from whitequark/manual_mem
2018-12-19 Icenowy Zhenganlogic: implement DRAM initialization
2018-12-19 Clifford WolfMerge pull request #752 from Icenowy/anlogic-lut-cost
2018-12-19 Clifford WolfMerge pull request #753 from Icenowy/anlogic-makefile-fix
2018-12-19 Clifford WolfMerge pull request #749 from Icenowy/anlogic-dram-fix
2018-12-19 Icenowy Zhenganlogic: fix Makefile.inc
2018-12-19 Icenowy ZhengAnlogic: let LUT5/6 have more cost than LUT4-
2018-12-18 Icenowy Zhenganlogic: set the init value of DFFs
2018-12-18 Icenowy Zhenganlogic: fix dbits of Anlogic Eagle DRAM16X4
2018-12-17 Clifford WolfMerge pull request #746 from Icenowy/anlogic-dram
2018-12-17 Icenowy Zhenganlogic: add support for Eagle Distributed RAM
2018-12-17 Icenowy ZhengRevert "Leave only real black box cells"
2018-12-16 Clifford WolfMerge pull request #736 from whitequark/select_assert_list
2018-12-16 Clifford WolfRename "fine:" label to "map:" in "synth_ice40"
2018-12-16 Clifford WolfMerge pull request #704 from webhat/feature/fix-awk
2018-12-16 Clifford WolfMerge pull request #738 from smunaut/issue_737
2018-12-16 Clifford WolfMerge pull request #735 from daveshah1/trifixes
2018-12-16 Clifford WolfMerge pull request #724 from whitequark/equiv_opt
2018-12-16 Clifford WolfMerge pull request #734 from grahamedgecombe/fix-shuffl...
2018-12-16 Clifford WolfMerge pull request #730 from smunaut/ffssr_dont_touch
2018-12-16 Clifford WolfMerge pull request #729 from whitequark/write_verilog_i...
2018-12-16 Clifford WolfMerge pull request #725 from olofk/ram4k-init
2018-12-16 Clifford WolfMerge pull request #714 from daveshah1/abc_preserve_naming
2018-12-16 Clifford WolfMerge pull request #723 from whitequark/synth_ice40_map...
2018-12-08 Sylvain Munautice40: Honor the "dont_touch" attribute in FFSSR pass
2018-12-07 whitequarkequiv_opt: pass -D EQUIV when techmapping.
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