Add {get,set}_src_attribute() methods on RTLIL::AttrObject
[yosys.git] / techlibs /
2017-08-28 Clifford WolfMerge branch 'recover-reduce' of https://github.com...
2017-08-28 Clifford WolfMerge pull request #392 from azonenberg/greenpak-portfixes
2017-08-27 Andrew ZonenbergFixed bug causing GP_SPI model to not synthesize
2017-08-18 Clifford WolfMerge branch 'sim'
2017-08-16 Clifford WolfMerge pull request #386 from azonenberg/gpak-counters
2017-08-15 Andrew ZonenbergFixed more issues with GreenPAK counter sim models
2017-08-15 Andrew ZonenbergUpdated PGEN model to have level triggered reset (match...
2017-08-15 Andrew ZonenbergFixed bug in GP_COUNTx model
2017-08-15 Andrew ZonenbergFixed bug where GP_COUNTx_ADV would wrap even when...
2017-08-15 Clifford WolfMerge branch 'rmports' of https://github.com/azonenberg...
2017-08-14 Clifford WolfMerge pull request #381 from azonenberg/countfix
2017-08-14 Clifford WolfMerge pull request #383 from azonenberg/abcfnames
2017-08-14 Clifford WolfMerge pull request #382 from azonenberg/jsoniofix
2017-08-14 Clifford WolfMerge pull request #384 from azonenberg/crtechlib
2017-08-14 Robert Oucoolrunner2: Add INVERT parameter to some BUFGs
2017-08-14 Robert Oucoolrunner2: Add FFs with clock enable to cells_sim.v
2017-08-14 Andrew ZonenbergFixed typo in GP_COUNT8 sim model
2017-08-14 Andrew ZonenbergFixed typo in error message
2017-08-14 Andrew ZonenbergChanged LEVEL resets for GP_COUNTx to be properly synth...
2017-08-14 Andrew ZonenbergChanged LEVEL resets to be edge triggered anyway
2017-08-14 Andrew ZonenbergAdded level-triggered reset support to GP_COUNTx simula...
2017-08-14 Andrew ZonenbergFixed undeclared "count" in GP_COUNT8_ADV
2017-08-14 Andrew ZonenbergFixed undeclared "count" in GP_COUNT14_ADV
2017-08-14 Andrew ZonenbergFixed typo in last commit
2017-08-14 Andrew ZonenbergFinished initial GP_COUNT8/14/8_ADV/14_ADV sim models...
2017-08-14 Andrew ZonenbergFixed typo in COUNT8 model
2017-08-14 Andrew ZonenbergMoved GP_POR out of digital cells b/c it has delays
2017-08-14 Andrew ZonenbergImproved cells_sim_digital model for GP_COUNT8
2017-08-14 Andrew ZonenbergRefactored GreenPAK4 cells_sim into cells_sim_ams and...
2017-07-10 Clifford WolfAdd techlibs/xilinx/lut2lut.v
2017-07-03 Clifford WolfFix some c++ clang compiler errors
2017-07-03 Clifford WolfApply minor coding style changes to coolrunner2 target
2017-07-03 Clifford WolfMerge pull request #352 from rqou/master
2017-06-27 Clifford WolfMerge pull request #353 from azonenberg/master
2017-06-26 Robert Oucoolrunner2: Add a few more primitives
2017-06-26 Robert Oucoolrunner2: Initial mapping of latches
2017-06-26 Robert Oucoolrunner2: Initial mapping of DFFs
2017-06-26 Robert Oucoolrunner2: Remove redundant INVERT_PTC
2017-06-26 Robert Oucoolrunner2: Remove debug prints
2017-06-26 Robert Oucoolrunner2: Correctly handle $_NOT_ after $sop
2017-06-26 Robert Oucoolrunner2: Also construct the XOR cell in the macrocell
2017-06-26 Robert Oucoolrunner2: Initial techmapping for $sop
2017-06-24 Andrew Zonenberggreenpak4_counters: Changed generation of primitive...
2017-06-24 Robert Oucoolrunner2: Initial commit
2017-05-31 Clifford WolfAdd dff2ff.v techmap file
2017-05-23 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2017-05-23 Clifford WolfMerge pull request #346 from azonenberg/master
2017-05-23 Andrew Zonenberggreenpak4_counters: Added support for parallel output...
2017-05-17 Clifford WolfAdd $_ANDNOT_ and $_ORNOT_ gates
2017-04-12 Larry DoolittleSquelch trailing whitespace
2017-04-07 Clifford WolfMerge pull request #337 from dh73/master
2017-04-06 dh73Add initial support for both MAX10 and Cyclone IV ...
2017-02-25 Clifford WolfMerge branch 'master' of https://github.com/klammerj...
2017-02-25 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2017-02-25 Clifford WolfAdd $live and $fair cell types, add support for s_event...
2017-02-24 Clifford WolfMerge pull request #322 from azonenberg/master
2017-02-24 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-16 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-14 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-14 Clifford WolfFix double-call of log_pop() in synth_greenpak4
2017-02-11 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-11 Clifford WolfMerge branch 'master' of https://github.com/stv0g/yosys...
2017-02-09 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-02-04 Clifford WolfAdd $cover cell type and SVA cover() support
2017-01-15 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-01-05 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-01-01 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2017-01-01 Andrew Zonenberggreenpak4: Added POUT to GP_COUNTx cells
2016-12-24 Clifford WolfMerge pull request #284 from azonenberg/master
2016-12-23 Andrew ZonenbergMerge pull request #1 from azonenberg-hk/master
2016-12-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-12-21 Andrew Zonenberggreenpak4: Added INT pin to GP_SPI
2016-12-21 Andrew Zonenberggreenpak4: removed unused MISO pin from GP_SPI
2016-12-20 Andrew Zonenberggreenpak4: Removed SPI_BUFFER parameter
2016-12-20 Andrew Zonenberggreenpak4: replaced MOSI/MISO with single one-way SDAT pin
2016-12-20 Andrew Zonenberggreenpak4: Changed port names on GP_SPI for clarity
2016-12-20 Andrew Zonenberggreenpak4: Initial implementation of GP_SPI cell
2016-12-17 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-12-17 Andrew Zonenberggreenpak4: Updated GP_DCMP cell model
2016-12-16 Andrew Zonenberggreenpak: Fixes to GP_DCMP* blocks. Added GP_CLKBUF.
2016-12-15 Andrew Zonenberggreenpak4: Initial version of GP_DCMP skeleton (not...
2016-12-14 Andrew Zonenberggreenpak4: More fixups of GP_DCMPx cells
2016-12-14 Andrew Zonenberggreenpak4: And another typo :(
2016-12-14 Andrew Zonenberggreenpak4: Fixed another typo
2016-12-14 Andrew Zonenberggreenpak4: Fixed typo
2016-12-14 Andrew Zonenberggreenpak4: Cleaned up trailing spaces in cells_sim
2016-12-14 Andrew Zonenberggreenpak4: Added GP_DCMPREF / GP_DCMPMUX
2016-12-12 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-12-11 Andrew ZonenbergAdded GP_PWRDET block, BANDWIDTH_KHZ parameter to GP_ABUF
2016-12-10 Andrew Zonenberggreenpak4: Added support for inferred input/output...
2016-12-10 Andrew Zonenberggreenpak4: Can now techmap inferred D latches (without...
2016-12-10 Andrew Zonenberggreenpak4: Inverted D latch cells now have nQ instead...
2016-12-06 Andrew ZonenbergAdded GP_DLATCH and GP_DLATCHI
2016-12-06 Andrew ZonenbergInitial implementation of techlib support for GreenPAK...
2016-12-06 Andrew ZonenbergUpdated help text for synth_greenpak4
2016-11-08 Clifford WolfIndenting fixes in gowin sim cell lib
2016-11-03 Clifford WolfAdded hex constant support to write_verilog
2016-11-01 Clifford WolfiCE40 flow is not experimental anymore
2016-11-01 Clifford WolfAdded initial version of "synth_gowin"
2016-10-19 Clifford WolfMerge pull request #250 from azonenberg/master
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