Avoid creation of bogus initial blocks for assert/assume in always @*
[yosys.git] / techlibs /
2016-08-30 Clifford WolfAdded "prep -nomem"
2016-08-30 Clifford WolfRemoved $aconst cell type
2016-08-28 Clifford WolfRemoved $predict again
2016-08-20 Clifford WolfAdded "wreduce -memx"
2016-08-19 Clifford WolfAdded memory_memx pass, "memory -memx", and "prep ...
2016-08-15 Clifford WolfAdded greenpak4_dffinv
2016-08-14 Clifford WolfMerge pull request #200 from azonenberg/master
2016-08-14 Andrew Zonenberggreenpak4: Changed name of inverted output ports for...
2016-08-14 Andrew Zonenberggreenpak4: Added GP_DFFxI cells
2016-08-14 Andrew Zonenberggreenpak4: Renamed ports for better consistency (see...
2016-08-11 Clifford WolfMerge pull request #198 from whitequark/master
2016-08-10 whitequarksynth_greenpak4: use attrmvcp to move LOC from wires...
2016-07-30 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-07-27 Clifford WolfAdded $anyconst and $aconst
2016-07-21 Clifford WolfAdded $initstate cell type and vlog function
2016-07-21 Clifford WolfAfter reading the SV spec, using non-standard predict...
2016-07-13 Clifford WolfAdded basic support for $expect cells
2016-07-13 Clifford WolfMerge pull request #191 from whitequark/json-module...
2016-07-13 Clifford WolfMerge pull request #193 from azonenberg/master
2016-07-12 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-07-12 Andrew ZonenbergAdded GP_DAC cell
2016-07-12 Andrew ZonenbergRemoved VOUT port of GP_BANDGAP
2016-07-12 Andrew ZonenbergRemoved splitnets in prep for new gp4par parser
2016-07-11 Clifford WolfAdded "prep -auto-top" and "synth -auto-top"
2016-07-10 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-07-10 Clifford WolfMerge pull request #189 from whitequark/master
2016-07-10 whitequarkgreenpak4: add GP_COUNT{8,14}_ADV cells.
2016-07-08 Clifford WolfMinor fixes in ice40_ff* passes for sloppy SB_DFF insta...
2016-07-08 Clifford WolfMerge branch 'yosys-0.5-vtr' of https://github.com...
2016-06-30 Clifford WolfImproved ice40_ffinit error reporting
2016-06-19 Clifford WolfMerge branch 'sv_packages' of https://github.com/rubund...
2016-06-19 Clifford WolfAdded "deminout"
2016-06-17 Clifford WolfImproved support for $sop cells
2016-06-17 Clifford WolfAdded $sop cell type and "abc -sop"
2016-06-09 Clifford WolfAdded "nlutmap -assert"
2016-06-08 Clifford WolfDo not run "wreduce" in "prep -ifx"
2016-06-06 Clifford WolfAdded "proc_mux -ifx"
2016-05-08 Clifford WolfMerge pull request #162 from azonenberg/master
2016-05-08 Andrew ZonenbergAdded GP_DELAY cell
2016-05-08 Andrew ZonenbergFixed typo in port name
2016-05-08 Andrew ZonenbergFixed extra semicolon
2016-05-08 Andrew ZonenbergFixed typo in parameter name
2016-05-08 Andrew ZonenbergAdded simulation timescale declaration
2016-05-06 Clifford WolfAdded synth_ice40 support for latches via logic loops
2016-05-06 Clifford WolfFixed ice40_opt lut unmapping, added "ice40_opt -unlut"
2016-05-05 Clifford WolfMerge pull request #159 from azonenberg/master
2016-05-05 Andrew ZonenbergChanged order of passes for better handling of INIT...
2016-05-05 Andrew ZonenbergRenamed module parameter
2016-05-04 Andrew ZonenbergRefactored synth_greenpak4 to use iopadmap for mapping...
2016-05-04 Clifford WolfMerge pull request #157 from azonenberg/master
2016-05-04 Andrew ZonenbergFixed incorrect signal naming in GP_IOBUF
2016-05-04 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-05-04 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-05-04 Andrew ZonenbergAdded tri-state I/O extraction for GreenPak
2016-05-04 Andrew ZonenbergAdded GreenPak I/O buffer cells
2016-05-03 Andrew ZonenbergAdded comment to clarify GP_ABUF cell
2016-05-03 Andrew ZonenbergAdded GP_ABUF cell
2016-05-02 Clifford WolfMerge pull request #154 from azonenberg/master
2016-05-01 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-29 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-28 Andrew ZonenbergAdded GP_PGA cell
2016-04-25 Clifford WolfMerge pull request #150 from azonenberg/master
2016-04-25 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-25 Andrew ZonenbergRemoved VIN_BUF_EN
2016-04-24 Andrew ZonenbergRenamed VOUT to OUT on GP_ACMP cell
2016-04-24 Andrew ZonenbergAdded GP_ACMP cell
2016-04-23 Clifford WolfAdded "prep -flatten" and "synth -flatten"
2016-04-23 Clifford WolfConverted "prep" to ScriptPass
2016-04-23 Clifford WolfRun clean after splitnets in synth_greenpak4
2016-04-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-23 Clifford WolfMerge https://github.com/azonenberg/yosys
2016-04-23 Clifford WolfAdded "shregmap" to synth_greenpak4
2016-04-23 Clifford WolfConverted synth_greenpak4 to ScriptPass
2016-04-23 Andrew ZonenbergFixed typo
2016-04-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-21 Clifford WolfAdded "yosys -D" feature
2016-04-21 Andrew ZonenbergAdded GP_VREF cell
2016-04-19 Clifford WolfMerge pull request #149 from azonenberg/master
2016-04-19 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-17 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-16 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-14 Andrew ZonenbergAdded GP_SHREG cell
2016-04-14 Andrew ZonenbergRefactoring: alphabetized cells_sim
2016-04-09 Andrew ZonenbergFixed missing semicolon
2016-04-09 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-09 Andrew ZonenbergAdded GP_RCOSC cell
2016-04-08 Clifford WolfMerge pull request #147 from azonenberg/master
2016-04-07 Andrew ZonenbergFixed assertion failure for non-inferrable counters...
2016-04-07 Andrew ZonenbergAdded second divider to GP_RINGOSC
2016-04-07 Andrew ZonenbergAdded GP_RINGOSC primitive
2016-04-07 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-05 Andrew ZonenbergAdded GP_POR
2016-04-04 Andrew ZonenbergAdded GP_BANDGAP cell
2016-04-02 Clifford WolfMerge pull request #144 from azonenberg/master
2016-04-02 Andrew ZonenbergRemoved more debug prints
2016-04-02 Andrew ZonenbergRemoved forgotten debug code
2016-04-02 Andrew ZonenbergAdded GreenPak inverter support
2016-04-02 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-02 Andrew ZonenbergAdded support for inferring counters with asynchronous...
2016-04-01 Clifford WolfMerge pull request #143 from azonenberg/master
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