2019-05-02 |
Clifford Wolf | Merge pull request #963 from YosysHQ/eddie/synth_xilinx... |
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2019-05-02 |
Eddie Hung | Back to passing all xc7srl tests! |
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2019-05-02 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into eddie... |
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2019-05-01 |
Eddie Hung | Merge branch 'master' of github.com:YosysHQ/yosys |
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2019-04-30 |
Clifford Wolf | Merge pull request #972 from YosysHQ/clifford/fix968 |
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2019-04-30 |
Clifford Wolf | Merge pull request #966 from YosysHQ/clifford/fix956 |
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2019-04-30 |
Clifford Wolf | Merge pull request #962 from YosysHQ/eddie/refactor_syn... |
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2019-04-30 |
Clifford Wolf | Merge branch 'master' into eddie/refactor_synth_xilinx |
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2019-04-30 |
Clifford Wolf | Add handling of init attributes in "opt_expr -undriven" |
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2019-04-30 |
Benedikt Tutzer | Merge branch 'master' of https://github.com/YosysHQ... |
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2019-04-29 |
Clifford Wolf | Merge pull request #960 from YosysHQ/eddie/equiv_opt_undef |
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2019-04-28 |
Eddie Hung | WIP |
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2019-04-28 |
Eddie Hung | Move neg-pol to pos-pol mapping from ff_map to cells_map.v |
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2019-04-26 |
Eddie Hung | Revert synth_xilinx 'fine' label more to how it used... |
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2019-04-26 |
Eddie Hung | Where did this check come from!?! |
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2019-04-26 |
Eddie Hung | Refactor synth_xilinx to auto-generate doc |
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2019-04-26 |
Eddie Hung | Cleanup ice40 |
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2019-04-22 |
Eddie Hung | Merge pull request #914 from YosysHQ/xc7srl |
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2019-04-22 |
Eddie Hung | Update help message |
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2019-04-22 |
Eddie Hung | Move 'shregmap -tech xilinx' into map_cells |
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2019-04-22 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xc7srl |
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2019-04-22 |
Clifford Wolf | Merge pull request #905 from christian-krieg/feature... |
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2019-04-22 |
Clifford Wolf | Merge pull request #941 from Wren6991/sim_lib_io_clke |
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2019-04-22 |
Clifford Wolf | Merge branch 'dh73-master' |
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2019-04-22 |
Clifford Wolf | Merge branch 'master' of https://github.com/dh73/yosys_... |
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2019-04-22 |
Clifford Wolf | Re-added clean after techmap in synth_xilinx |
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2019-04-22 |
Clifford Wolf | Merge pull request #916 from YosysHQ/map_cells_before_m... |
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2019-04-22 |
Clifford Wolf | Merge pull request #911 from mmicko/gowin-nobram |
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2019-04-22 |
Clifford Wolf | Merge pull request #909 from zachjs/master |
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2019-04-21 |
Eddie Hung | Tidy up, fix for -nosrl |
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2019-04-21 |
Eddie Hung | Merge branch 'map_cells_before_map_luts' into xc7srl |
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2019-04-21 |
Eddie Hung | Merge branch 'master' into map_cells_before_map_luts |
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2019-04-21 |
Eddie Hung | Add comments |
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2019-04-21 |
Eddie Hung | Use new pmux2shiftx from #944, remove my old attempt |
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2019-04-21 |
Luke Wren | ice40 cells_sim.v: SB_IO: update clock enable behaviour... |
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2019-04-21 |
Eddie Hung | Merge remote-tracking branch 'origin/clifford/pmux2shif... |
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2019-04-21 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xc7srl |
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2019-04-20 |
Clifford Wolf | Merge pull request #943 from YosysHQ/clifford/whitebox |
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2019-04-20 |
Eddie Hung | Merge remote-tracking branch 'origin/pmux2shiftx' into... |
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2019-04-20 |
Eddie Hung | Merge remote-tracking branch 'origin' into xc7srl |
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2019-04-20 |
Clifford Wolf | Merge pull request #942 from YosysHQ/clifford/fix931 |
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2019-04-18 |
Eddie Hung | Merge pull request #917 from YosysHQ/eddie/fix_retime |
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2019-04-18 |
Eddie Hung | Revert "synth_* with -retime option now calls abc with... |
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2019-04-18 |
Eddie Hung | Merge branch 'master' into eddie/fix_retime |
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2019-04-13 |
Diego | GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM... |
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2019-04-12 |
Eddie Hung | Merge pull request #928 from litghost/add_xc7_sim_models |
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2019-04-12 |
Keith Rothman | Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra. |
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2019-04-12 |
Clifford Wolf | Merge pull request #933 from dh73/master |
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2019-04-12 |
Diego | Fixing issues in CycloneV cell sim |
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2019-04-10 |
Eddie Hung | synth_* with -retime option now calls abc with -D 1... |
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2019-04-10 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into eddie... |
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2019-04-09 |
Keith Rothman | Fix LUT6_2 definition. |
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2019-04-09 |
Keith Rothman | Add additional cells sim models for core 7-series prima... |
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2019-04-08 |
Eddie Hung | Merge branch 'undo_pr895' into xc7srl |
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2019-04-06 |
Eddie Hung | Call shregmap twice -- once for variable, another for... |
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2019-04-05 |
Eddie Hung | Merge branch 'eddie/fix_retime' into xc7srl |
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2019-04-05 |
Eddie Hung | Move dffinit til after abc |
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2019-04-05 |
Eddie Hung | Merge branch 'eddie/fix_retime' into xc7srl |
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2019-04-05 |
Eddie Hung | Move techamp t:$_DFF_?N? to before abc call |
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2019-04-05 |
Eddie Hung | Retry |
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2019-04-05 |
Eddie Hung | Resolve @daveshah1 comment, update synth_xilinx help |
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2019-04-05 |
Eddie Hung | synth_xilinx to techmap FFs after abc call, otherwise... |
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2019-04-05 |
Eddie Hung | techmap inside map_cells stage |
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2019-04-04 |
Eddie Hung | Merge branch 'map_cells_before_map_luts' into xc7srl |
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2019-04-04 |
Eddie Hung | Missing techmap entry in help |
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2019-04-04 |
Eddie Hung | Use soft-logic, not LUT3 instantiation |
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2019-04-04 |
Eddie Hung | Merge branch 'map_cells_before_map_luts' into xc7srl |
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2019-04-04 |
Eddie Hung | synth_xilinx to map_cells before map_luts |
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2019-04-04 |
Eddie Hung | Cleanup comments |
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2019-04-04 |
Eddie Hung | t:$dff* -> t:$dff t:$dffe |
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2019-04-03 |
Eddie Hung | -nosrl meant when -nobram |
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2019-04-03 |
Eddie Hung | Remove duplicate STARTUPE2 |
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2019-04-03 |
Eddie Hung | Disable shregmap in synth_xilinx if -retime |
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2019-04-03 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xc7srl |
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2019-04-02 |
Miodrag Milanovic | Make nobram false by default for gowin |
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2019-03-28 |
Benedikt Tutzer | Merge remote-tracking branch 'origin/master' into featu... |
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2019-03-25 |
Eddie Hung | synth_xilinx to use shregmap with -minlen 3 |
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2019-03-25 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xc7srl |
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2019-03-22 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xc7srl |
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2019-03-22 |
Clifford Wolf | Merge pull request #889 from YosysHQ/clifford/fix888 |
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2019-03-22 |
Clifford Wolf | Merge pull request #890 from YosysHQ/clifford/fix887 |
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2019-03-22 |
David Shah | Merge pull request #891 from YosysHQ/xilinx_keep |
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2019-03-22 |
David Shah | xilinx: Add keep attribute where appropriate |
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2019-03-21 |
Eddie Hung | Add '-nosrl' option to synth_xilinx |
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2019-03-20 |
Eddie Hung | Fine tune cells_map.v |
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2019-03-20 |
Eddie Hung | Revert $__SHREG_ to orig; use $__XILINX_SHREG for varia... |
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2019-03-20 |
Eddie Hung | Add support for variable length Xilinx SRL > 128 |
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2019-03-19 |
Eddie Hung | Restore original synth_xilinx commands |
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2019-03-19 |
Eddie Hung | Fix spacing |
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2019-03-19 |
Eddie Hung | Fix INIT for variable length SRs that have been bumped... |
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2019-03-19 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xc7srl |
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2019-03-19 |
Clifford Wolf | Merge pull request #885 from YosysHQ/clifford/fix873 |
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2019-03-19 |
Clifford Wolf | Add Xilinx negedge FFs to synth_xilinx dffinit call... |
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2019-03-19 |
Eddie Hung | Merge https://github.com/YosysHQ/yosys into read_aiger |
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2019-03-16 |
Eddie Hung | Only accept <128 for variable length, only if $shiftx... |
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2019-03-16 |
Eddie Hung | Cleanup synth_xilinx |
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2019-03-16 |
Eddie Hung | Working |
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2019-03-14 |
Eddie Hung | Reverse bits in INIT parameter for Xilinx, since MSB... |
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2019-03-14 |
Eddie Hung | Misspell |
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2019-03-14 |
Eddie Hung | Revert "Add shregmap -init_msb_first and use in synth_x... |
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