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share codepath for scratchpad argument handling with command arguments
[yosys.git]
/
techlibs
/
2020-01-03
N. Engelhardt
Merge branch 'master' of https://github.com/YosysHQ...
tree
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commitdiff
2020-01-02
whitequark
Merge pull request #1604 from whitequark/unify-ram...
tree
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commitdiff
2020-01-02
Clifford Wolf
Merge pull request #1609 from YosysHQ/clifford/fix1596
tree
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commitdiff
2020-01-02
Eddie Hung
Merge pull request #1601 from YosysHQ/eddie/synth_retime
tree
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commitdiff
2020-01-02
Eddie Hung
Merge pull request #1608 from YosysHQ/eddie/ifndef_YOSYS
tree
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commitdiff
2020-01-02
Eddie Hung
ifdef __ICARUS__ -> ifndef YOSYS
tree
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commitdiff
2020-01-01
Eddie Hung
Merge pull request #1606 from YosysHQ/eddie/improve_tests
tree
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commitdiff
2020-01-01
Eddie Hung
Fix anlogic async flop mapping
tree
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commitdiff
2020-01-01
whitequark
Harmonize BRAM/LUTRAM descriptions across all of Yosys.
tree
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commitdiff
2019-12-30
Eddie Hung
Update timings for Xilinx S7 cells
tree
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commitdiff
2019-12-30
Eddie Hung
Update doc that "-retime" calls abc with "-dff -D 1"
tree
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commitdiff
2019-12-30
Eddie Hung
Disable synth_gowin -abc9 as it offers no advantages yet
tree
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commitdiff
2019-12-30
Eddie Hung
Revert "Revert "synth_* with -retime option now calls...
tree
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commitdiff
2019-12-30
Miodrag Milanović
Merge pull request #1589 from YosysHQ/iopad_default
tree
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commitdiff
2019-12-30
Eddie Hung
Merge pull request #1599 from YosysHQ/eddie/retry_1588
tree
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commitdiff
2019-12-30
Eddie Hung
Merge pull request #1600 from YosysHQ/eddie/cleanup_ecp5
tree
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commitdiff
2019-12-28
Miodrag Milanovic
Merge remote-tracking branch 'origin/master' into iopad...
tree
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commitdiff
2019-12-28
Eddie Hung
Nitpick cleanup for ecp5
tree
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commitdiff
2019-12-25
Marcin Kościelnicki
Merge pull request #1593 from YosysHQ/mwk/dsp48a1-pmgen
tree
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commitdiff
2019-12-23
Marcin Kościelnicki
xilinx: Test our DSP48A/DSP48A1 simulation models.
tree
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commitdiff
2019-12-22
Marcin Kościelnicki
xilinx_dsp: Initial DSP48A/DSP48A1 support.
tree
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commitdiff
2019-12-21
Miodrag Milanovic
Addressed review comments
tree
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commitdiff
2019-12-21
Miodrag Milanovic
iopad no op for compatibility with old scripts
tree
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commitdiff
2019-12-21
Miodrag Milanovic
Make iopad option default for all xilinx flows
tree
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commitdiff
2019-12-20
Eddie Hung
Merge pull request #1588 from YosysHQ/eddie/xaiger_cleanup
tree
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commitdiff
2019-12-20
Eddie Hung
Add abc9_arrival times for RAM{32,64}M
tree
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commitdiff
2019-12-20
Eddie Hung
Add RAM{32,64}M to abc9_map.v
tree
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commitdiff
2019-12-20
Eddie Hung
Merge pull request #1585 from YosysHQ/eddie/fix_abc9_lut
tree
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commitdiff
2019-12-20
Eddie Hung
Merge pull request #1587 from YosysHQ/revert-1558-eddie...
tree
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commitdiff
2019-12-20
Eddie Hung
Revert "Optimise write_xaiger"
tree
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commitdiff
2019-12-19
Eddie Hung
Merge pull request #1581 from YosysHQ/clifford/fix1565
tree
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commitdiff
2019-12-19
Eddie Hung
Merge pull request #1558 from YosysHQ/eddie/xaiger_cleanup
tree
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commitdiff
2019-12-19
Eddie Hung
Merge pull request #1569 from YosysHQ/eddie/fix_1531
tree
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commitdiff
2019-12-19
Eddie Hung
Merge pull request #1571 from YosysHQ/eddie/fix_1570
tree
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commitdiff
2019-12-19
Marcin Kościelnicki
xilinx: Add simulation models for remaining CLB primitives.
tree
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commitdiff
2019-12-19
Marcin Kościelnicki
xilinx_dffopt: Keep order of LUT inputs.
tree
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commitdiff
2019-12-18
Eddie Hung
Merge branch 'master' of github.com:YosysHQ/yosys
tree
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commitdiff
2019-12-18
David Shah
Merge pull request #1563 from YosysHQ/dave/async-prld
tree
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commitdiff
2019-12-18
Eddie Hung
Merge pull request #1572 from nakengelhardt/scratchpad_pass
tree
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commitdiff
2019-12-18
Marcin Kościelnicki
xilinx: Add xilinx_dffopt pass (#1557)
tree
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commitdiff
2019-12-18
Marcin Kościelnicki
xilinx: Improve flip-flop handling.
tree
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commitdiff
2019-12-17
Eddie Hung
Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram
tree
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commitdiff
2019-12-17
Eddie Hung
Merge pull request #1521 from dh73/diego/memattr
tree
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commitdiff
2019-12-16
Eddie Hung
Add unconditional match blocks for force RAM
tree
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commitdiff
2019-12-16
Eddie Hung
Update xc7/xcu bram rules
tree
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commitdiff
2019-12-16
Eddie Hung
Merge branch 'diego/memattr' of https://github.com...
tree
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commitdiff
2019-12-16
Eddie Hung
Merge branch 'eddie/xilinx_lutram' of github.com:YosysH...
tree
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commitdiff
2019-12-16
Eddie Hung
Populate DID/DOD even if unused
tree
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commitdiff
2019-12-16
Eddie Hung
Rename *RAM{32,64}M rules to RAM{32X2,64X1}Q
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commitdiff
2019-12-16
Diego H
Removing fixed attribute value to !ramstyle rules
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commitdiff
2019-12-16
Diego H
Merging attribute rules into a single match block;...
tree
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commitdiff
2019-12-16
Eddie Hung
Merge pull request #1575 from rodrigomelo9/master
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commitdiff
2019-12-16
Eddie Hung
Merge pull request #1577 from gromero/for-yosys
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commitdiff
2019-12-13
Diego H
Refactoring memory attribute matching based on IEEE...
tree
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commitdiff
2019-12-13
Eddie Hung
Merge pull request #1533 from dh73/bram_xilinx
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commitdiff
2019-12-13
Eddie Hung
Disable RAM16X1D match rule; carry-over from LUT4 arches
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commitdiff
2019-12-13
Eddie Hung
RAM64M8 to also have [5:0] for address
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commitdiff
2019-12-13
Eddie Hung
Add RAM32X6SDP and RAM64X3SDP modes
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commitdiff
2019-12-13
Eddie Hung
Fix RAM64M model to have 6 bit address bus
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commitdiff
2019-12-13
Eddie Hung
Add memory rules for RAM16X1D, RAM32M, RAM64M
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commitdiff
2019-12-12
Diego H
Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB3...
tree
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commitdiff
2019-12-12
Eddie Hung
abc9_map.v: fix Xilinx LUTRAM
tree
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commitdiff
2019-12-12
Diego H
Updating RAMB36E1 thresholds. Adding test for both...
tree
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commitdiff
2019-12-12
Diego H
Merge https://github.com/YosysHQ/yosys into bram_xilinx
tree
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commitdiff
2019-12-11
Eddie Hung
Fix bitwidth mismatch; suppresses iverilog warning
tree
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commitdiff
2019-12-11
David Shah
Merge pull request #1564 from ZirconiumX/intel_housekeeping
tree
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commitdiff
2019-12-10
Dan Ravensloft
synth_intel: a10gx -> arria10gx
tree
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commitdiff
2019-12-10
Dan Ravensloft
synth_intel: cyclone10 -> cyclone10lp
tree
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commitdiff
2019-12-10
Eddie Hung
Merge pull request #1545 from YosysHQ/eddie/ice40_wrapc...
tree
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commitdiff
2019-12-09
Eddie Hung
ice40_opt to restore attributes/name when unwrapping
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commitdiff
2019-12-09
Eddie Hung
Sensitive to direct inst of $__ICE40_CARRY_WRAPPER...
tree
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commitdiff
2019-12-09
Eddie Hung
ice40_wrapcarry to really preserve attributes via ...
tree
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commitdiff
2019-12-07
David Shah
ecp5: Add support for mapping PRLD FFs
tree
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commitdiff
2019-12-07
Eddie Hung
techmap/aigmap of whiteboxes to occur before abc9 inste...
tree
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commitdiff
2019-12-05
Clifford Wolf
Merge pull request #1551 from whitequark/manual-cell...
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commitdiff
2019-12-04
Marcin Kościelnicki
xilinx: Add tristate buffer mapping. (#1528)
tree
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commitdiff
2019-12-04
Marcin Kościelnicki
xilinx: Add models for LUTRAM cells. (#1537)
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commitdiff
2019-12-03
Eddie Hung
$__ICE40_CARRY_WRAPPER to use _TECHMAP_REPLACE_ for...
tree
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commitdiff
2019-12-03
Eddie Hung
ice40_opt to ignore (* keep *) -ed cells
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commitdiff
2019-12-03
Clifford Wolf
Merge pull request #1524 from pepijndevos/gowindffinit
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commitdiff
2019-12-03
Pepijn de Vos
Use -match-init to not synth contradicting init values
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commitdiff
2019-12-02
Clifford Wolf
Merge pull request #1539 from YosysHQ/mwk/ilang-bounds...
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commitdiff
2019-11-29
Miodrag Milanović
Merge pull request #1540 from YosysHQ/mwk/xilinx-bufpll
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commitdiff
2019-11-29
Marcin Kościelnicki
xilinx: Add missing blackbox cell for BUFPLL.
tree
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commitdiff
2019-11-27
Diego H
Adjusting Vivado's BRAM min bits threshold for RAMB18E1
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commitdiff
2019-11-27
Clifford Wolf
Merge pull request #1501 from YosysHQ/dave/mem_copy_attr
tree
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commitdiff
2019-11-26
Marcin Kościelnicki
xilinx: Add simulation models for IOBUF and OBUFT.
tree
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commitdiff
2019-11-25
Marcin Kościelnicki
clkbufmap: Add support for inverters in clock path.
tree
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commitdiff
2019-11-25
Marcin Kościelnicki
xilinx: Use INV instead of LUT1 when applicable
tree
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commitdiff
2019-11-25
Pepijn de Vos
attempt to fix formatting
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commitdiff
2019-11-25
Pepijn de Vos
gowin: add and test dff init values
tree
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commitdiff
2019-11-23
Eddie Hung
Merge pull request #1520 from pietrmar/fix-1463
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commitdiff
2019-11-23
Martin Pietryka
coolrunner2: remove spurious log_pop() call, fixes...
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commitdiff
2019-11-22
Clifford Wolf
Merge pull request #1511 from YosysHQ/dave/always
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commitdiff
2019-11-22
Marcin Kościelnicki
gowin: Add missing .gitignore entries
tree
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commitdiff
2019-11-19
Clifford Wolf
Merge pull request #1449 from pepijndevos/gowin
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commitdiff
2019-11-19
Pepijn de Vos
Remove dff init altogether
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commitdiff
2019-11-19
Marcin Kościelnicki
xilinx: Add simulation models for MULT18X18* and DSP48A*.
tree
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commitdiff
2019-11-18
Pepijn de Vos
add help for nowidelut and abc9 options
tree
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commitdiff
2019-11-18
whitequark
Merge pull request #1494 from whitequark/write_verilog...
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