Comment out SB_MAC16 arrival time for now, need to handle all its modes
[yosys.git] / techlibs /
2019-08-29 Eddie HungComment out SB_MAC16 arrival time for now, need to...
2019-08-29 Eddie HungAdd arrival for SB_MAC16.O
2019-08-29 Eddie HungAdd arrival times for U
2019-08-29 Eddie HungLX -> LP
2019-08-29 Eddie HungRound not floor
2019-08-29 Eddie HungAdd LP timings
2019-08-29 Eddie HungLX -> LP
2019-08-29 Eddie HungMerge remote-tracking branch 'origin/eddie/fix_carry_wr...
2019-08-29 Eddie HungDo not overwrite LUT param
2019-08-29 Eddie HungDo not overwrite LUT param
2019-08-29 Eddie HungMerge remote-tracking branch 'origin/eddie/fix_carry_wr...
2019-08-29 Eddie HungTrailing comma
2019-08-29 Eddie HungAdapt to $__ICE40_CARRY_WRAPPER
2019-08-29 Eddie HungRevert "Remove $__ICE40_FULL_ADDER handling from ice40_...
2019-08-29 Eddie HungAdd arrival times for HX devices
2019-08-29 Eddie HungSpecify ice40 family to cells_sim.v using define
2019-08-29 Eddie HungMerge remote-tracking branch 'origin/eddie/fix_carry_wr...
2019-08-29 Eddie HungRemove $__ICE40_FULL_ADDER handling from ice40_opt...
2019-08-29 Eddie HungUpdate box size and timings
2019-08-29 Eddie HungUpdate to new $__ICE40_CARRY_WRAPPER
2019-08-28 Eddie HungMerge branch 'eddie/xilinx_srl' into xaig_arrival
2019-08-28 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_...
2019-08-28 Eddie HungMerge pull request #1334 from YosysHQ/clifford/async2sy...
2019-08-28 Eddie HungAdd (* clkbuf_sink *) to SRLC16E, reorder ports to...
2019-08-28 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-28 David ShahMerge pull request #1332 from YosysHQ/dave/ecp5gsr
2019-08-27 Clifford WolfMerge pull request #1325 from YosysHQ/eddie/sat_init
2019-08-27 Marcin Koƛcielnickixilinx: Add SRLC16E primitive.
2019-08-27 Eddie HungMerge pull request #1292 from YosysHQ/mwk/xilinx_bufgmap
2019-08-27 David Shahecp5: Add GSR support
2019-08-26 Eddie HungMerge branch 'master' into eddie/xilinx_srl
2019-08-26 Eddie HungMerge branch 'master' into mwk/xilinx_bufgmap
2019-08-26 Clifford WolfMerge tag 'yosys-0.9'
2019-08-25 Clifford WolfMerge pull request #1112 from acw1251/pyosys_sigsig_issue
2019-08-24 Clifford WolfMerge pull request #1327 from YosysHQ/clifford/pmgen
2019-08-23 Eddie HungAdd undocumented feature
2019-08-23 Eddie HungMerge branch 'xaig_arrival' of github.com:YosysHQ/yosys...
2019-08-23 Eddie HungFix spacing
2019-08-23 Eddie HungRemove unused model
2019-08-23 Eddie Hungxilinx_srl now copes with word-level flops $dff{,e}
2019-08-23 Eddie HungMerge remote-tracking branch 'origin/clifford/pmgen...
2019-08-23 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-23 Eddie HungPut attributes above port
2019-08-23 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_...
2019-08-23 Eddie HungMerge branch 'master' into mwk/xilinx_bufgmap
2019-08-23 Eddie HungForgot one
2019-08-23 Eddie HungMerge branch 'master' into mwk/xilinx_bufgmap
2019-08-23 Eddie HungPut abc_* attributes above port
2019-08-23 Eddie HungMerge remote-tracking branch 'origin/master' into mwk...
2019-08-22 Eddie HungMerge pull request #1319 from TeaEngineering/shuckc...
2019-08-22 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-22 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-22 Eddie HungMerge pull request #1317 from YosysHQ/eddie/opt_expr_shiftx
2019-08-22 Clifford WolfFix missing newline at end of file
2019-08-22 Clifford WolfMerge pull request #1289 from mmicko/anlogic_fixes
2019-08-22 Clifford WolfFix missing newline at end of file
2019-08-22 Clifford WolfMerge pull request #1281 from mmicko/efinix
2019-08-22 Eddie HungAdd variable length support to xilinx_srl
2019-08-21 Eddie Hungabc9 to perform new 'map_ffs' before 'map_luts'
2019-08-21 Eddie HungMerge branch 'eddie/fix_mem2reg' into eddie/xilinx_srl
2019-08-21 Eddie HungAdd init support
2019-08-21 Eddie HungUse semicolon
2019-08-21 Eddie Hungtechmap before read
2019-08-21 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_...
2019-08-21 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_...
2019-08-21 Eddie HungAdd abc_arrival to SRL*
2019-08-21 Clifford WolfMerge pull request #1314 from YosysHQ/eddie/fix_techmap
2019-08-21 Eddie HungMissing newline
2019-08-21 Eddie HungOops
2019-08-21 Eddie HungMerge branch 'eddie/fix_techmap' into xaig_arrival
2019-08-21 Eddie Hungxilinx to use abc_map.v with -max_iter 1
2019-08-21 Eddie Hungecp5: remove DPR16X4 from abc_unmap.v
2019-08-21 Eddie Hungecp5 to use -max_iter 1
2019-08-21 Eddie Hungecp5 to use abc_map.v and _unmap.v
2019-08-21 Eddie HungAdd reference to FD* timing
2019-08-21 Eddie HungRemove sequential extension
2019-08-21 Eddie HungRemove SRL* delays from cells_sim.v
2019-08-21 Eddie HungLUTMUX -> LUTMUX6
2019-08-21 Eddie HungCleanup techmap in map_luts
2019-08-21 Eddie HungMove `techmap abc_map.v` into map_luts
2019-08-21 Eddie HungRemove delays from abc_map.v
2019-08-21 Eddie HungTypo
2019-08-21 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-08-20 Eddie HungWrap SRL{16,32} too
2019-08-20 Eddie HungWrap LUTRAMs in order to capture comb/seq behaviour
2019-08-20 Eddie HungAdd LUTRAM delays
2019-08-20 Eddie HungRemove mapping rules
2019-08-20 Eddie HungMerge pull request #1209 from YosysHQ/eddie/synth_xilinx
2019-08-20 Eddie HungRemove -icells
2019-08-20 Eddie HungUse abc_{map,unmap,model}.v
2019-08-20 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-08-20 Eddie HungMerge pull request #1304 from YosysHQ/eddie/abc9_refactor
2019-08-20 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-19 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-08-19 Eddie HungAdd arrival times for SRL outputs
2019-08-19 Eddie HungAdd BRAM arrival times
2019-08-19 Eddie HungAdd reference to source of Tclktoq timing
2019-08-19 Eddie Hung Add 'abc_arrival' attribute for flop outputs
2019-08-19 Eddie HungUpdate box timings
2019-08-19 Eddie HungMove from cell attr to module attr
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