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Adding a note (TODO) in the memory_params.ys check file
[yosys.git]
/
tests
/
arch
/
anlogic
/
2019-11-16
Pepijn de Vos
Merge branch 'master' of https://github.com/YosysHQ...
tree
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commitdiff
2019-11-14
Clifford Wolf
Merge pull request #1444 from btut/feature/python_wrapp...
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commitdiff
2019-11-14
Clifford Wolf
Merge pull request #1465 from YosysHQ/dave/ice40_timing_sim
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commitdiff
2019-11-14
Clifford Wolf
Merge branch 'label-bads-btor' of https://github.com...
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commitdiff
2019-11-13
whitequark
Merge pull request #1488 from whitequark/flowmap-fixes
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commitdiff
2019-11-12
Clifford Wolf
Merge pull request #1484 from YosysHQ/clifford/cmp2luteqne
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commitdiff
2019-11-11
Miodrag Milanovic
Fixed tests
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2019-10-27
Clifford Wolf
Merge pull request #1393 from whitequark/write_verilog...
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commitdiff
2019-10-22
Clifford Wolf
Merge pull request #1452 from nakengelhardt/fix_dsp_mem_reg
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2019-10-21
Pepijn de Vos
Merge branch 'master' of https://github.com/YosysHQ...
tree
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commitdiff
2019-10-18
Miodrag Milanović
Merge pull request #1454 from YosysHQ/mmicko/common_tests
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commitdiff
2019-10-18
Miodrag Milanovic
Common memory test now shared
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commitdiff
2019-10-18
Miodrag Milanovic
Share common tests
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commitdiff
2019-10-18
Miodrag Milanovic
Fix path to yosys
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commitdiff
2019-10-18
Miodrag Milanovic
Moved all tests in arch sub directory
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