git.libre-soc.org Git - gem5.git/history - tests/configs/base

[gem5.git] / tests / configs / base_config.py

2014-09-20	Andreas Hansson	mem: Rename Bus to XBar to better reflect its behaviour	blob \| commitdiff \| raw
2013-08-19	Andreas Hansson	mem: Change AbstractMemory defaults to match the common...	blob \| commitdiff \| raw \| diff to current
2013-08-19	Akash Bagdia	power: Add voltage domains to the clock domains	blob \| commitdiff \| raw \| diff to current
2013-08-19	Andreas Hansson	config: Move the memory instantiation outside FSConfig	blob \| commitdiff \| raw \| diff to current
2013-06-27	Akash Bagdia	sim: Add the notion of clock domains to all ClockedObjects	blob \| commitdiff \| raw \| diff to current
2013-06-27	Andreas Hansson	config: Add a BaseSESystem builder for re-use in regres...	blob \| commitdiff \| raw \| diff to current
2013-06-27	Akash Bagdia	config: Add a system clock command-line option	blob \| commitdiff \| raw \| diff to current
2013-06-27	Akash Bagdia	config: Remove redundant explicit setting of default...	blob \| commitdiff \| raw \| diff to current
2013-04-23	Nilay Vaish	x86: regressions: add switcher full test	blob \| commitdiff \| raw \| diff to current
2013-04-22	Andreas Sandberg	tests: Add support for testing KVM-based CPUs	blob \| commitdiff \| raw \| diff to current
2013-01-07	Andreas Sandberg	tests: Add CPU switching tests	blob \| commitdiff \| raw \| diff to current
2013-01-07	Andreas Hansson	config: Do not use hardcoded physmem in fs script	blob \| commitdiff \| raw \| diff to current
2013-01-07	Andreas Sandberg	tests: Create base classes to encapsulate common test...	blob \| commitdiff \| raw \| diff to current

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