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cpu: o3: combine if with same condition
[gem5.git]
/
tests
/
configs
/
tgen-simple-mem.py
2015-03-02
Andreas Hansson
mem: Move crossbar default latencies to subclasses
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2014-12-23
Andreas Hansson
tests: Add a regression for the stack distance calculator
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2014-09-20
Andreas Hansson
mem: Rename Bus to XBar to better reflect its behaviour
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2014-05-09
Sascha Bischoff
mem: Auto-generate CommMonitor trace file names
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2013-08-19
Akash Bagdia
power: Add voltage domains to the clock domains
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2013-06-27
Akash Bagdia
sim: Add the notion of clock domains to all ClockedObjects
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2013-06-27
Akash Bagdia
config: Add a system clock command-line option
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2013-06-27
Akash Bagdia
config: Remove redundant explicit setting of default...
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2013-01-07
Andreas Hansson
cpu: Add support for protobuf input for the trace generator
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2013-01-07
Andreas Hansson
mem: Add tracing support in the communication monitor
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2012-09-21
Andreas Hansson
TrafficGen: Add a basic traffic generator regression
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