cpu: o3: combine if with same condition
[gem5.git] / tests / configs /
2015-03-02 Andreas Hanssonmem: Move crossbar default latencies to subclasses
2015-02-11 Andreas Hanssoncpu: Tidy up the MemTest and make false sharing more...
2015-01-20 Andreas Hanssontests: Remove deprecated InOrderCPU tests
2014-12-23 Andreas Hanssontests: Add a regression for the stack distance calculator
2014-11-06 Nilay Vaishruby: interface with classic memory controller
2014-11-06 Nilay Vaishruby: single physical memory in fs mode
2014-10-30 Ali Saidiautomated merge
2014-10-30 Ali Saidiarm, tests: Update config files to more recent kernels...
2014-09-20 Andreas Hanssontests: Use more representative configs for ARM tests
2014-09-20 Andreas Hanssonmem: Rename Bus to XBar to better reflect its behaviour
2014-09-20 Andreas Hanssontests: Add a memtest version using the ideal SnoopFilter
2014-09-03 Andreas Hanssonalpha: Stop using 'inorder' and rely entirely on 'minor'
2014-09-03 Andreas Hanssontests: Use O3_ARM_v7a config for full-system ARM regres...
2014-09-01 Emilio Castillo... ruby: Fixes clock domains in configuration files
2014-07-23 Andrew Bardsleycpu: Minor CPU add regression tests for ARM and ALPHA
2014-05-09 Andreas Hanssontests: Reflect name change in DRAM tests
2014-05-09 Sascha Bischoffmem: Auto-generate CommMonitor trace file names
2014-03-20 Nilay Vaishconfig: ruby: rename _cpu_ruby_ports to _cpu_ports
2014-03-20 Nilay Vaishconfig: remove ruby_fs.py
2014-03-20 Nilay Vaishruby: no piobus in se mode
2014-02-25 Nilay Vaishruby: correct errors in changeset 4eec7bdde5b0
2014-02-24 Nilay Vaishruby: route all packets through ruby port
2014-01-04 Steve Reinhardtconfig, x86: move kernel specification from tests to... stable_2014_02_15
2013-11-14 Steve Reinhardttests: suppress output on switcheroo tests
2013-11-01 Andreas Hanssontest: Use SimpleMemory for atomic full-system tests
2013-08-20 Nilay Vaishruby: add option for number of transitions per cycle
2013-08-19 Andreas Hanssonmem: Change AbstractMemory defaults to match the common...
2013-08-19 Akash Bagdiapower: Add voltage domains to the clock domains
2013-08-19 Andreas Hanssonconfig: Move the memory instantiation outside FSConfig
2013-07-02 Nilay Vaishregressions: update a couple of configs
2013-06-27 Akash Bagdiasim: Add the notion of clock domains to all ClockedObjects
2013-06-27 Andreas Hanssonconfig: Add a BaseSESystem builder for re-use in regres...
2013-06-27 Akash Bagdiaconfig: Add a system clock command-line option
2013-06-27 Akash Bagdiaconfig: Remove redundant explicit setting of default...
2013-05-30 Andreas Hanssonmem: More descriptive DRAM config names
2013-04-28 Andreas Hanssonconfig: Added memory type to t1000 regression
2013-04-23 Nilay Vaishx86: regressions: add switcher full test
2013-04-22 Andreas Hanssonconfig: Add a mem-type config option to se/fs scripts
2013-04-22 Andreas Sandbergtests: Add support for testing KVM-based CPUs
2013-04-22 Andreas Sandbergarm: Enable support for triggering a sim panic on kerne...
2013-03-07 Nilay Vaishruby: remove the functional copy of memory in se mode
2013-02-15 Andreas Sandbergconfig: Move CPU handover logic to m5.switchCpus()
2013-01-31 Andreas Hanssonmem: Add DDR3 and LPDDR2 DRAM controller configurations
2013-01-07 Andreas Sandbergtests: Add CPU switching tests
2013-01-07 Andreas Hanssonconfig: Do not use hardcoded physmem in fs script
2013-01-07 Andreas Hanssoncpu: Add support for protobuf input for the trace generator
2013-01-07 Andreas Hanssonmem: Add tracing support in the communication monitor
2013-01-07 Ali Saiditests: Always specify memory mode in every test system.
2013-01-07 Andreas Sandbergtests: Create base classes to encapsulate common test...
2012-10-31 Andreas Hanssonstats: Update stats for fixed simple-atomic-mp config
2012-10-31 Andreas Hanssonconfig: Fix a typo in the simple-atomic-mp configuration
2012-10-30 Andreas Hanssonconfig: Unify caches used in regressions and adjust...
2012-10-26 Andreas Hanssonconfig: Fix the cache class naming in regression scripts
2012-10-25 Andreas Hanssonconfig: Use SimpleDRAM in full-system, and with o3...
2012-10-25 Andreas Hanssonconfig: Use shared cache config for regressions
2012-10-15 Andreas HanssonMem: Use cycles to express cache-related latencies
2012-10-15 Andreas HanssonConfigs: Set the memtest clock to a reasonable value
2012-10-15 Andreas HanssonRegression: Use addTwoLevelCacheHierarchy in configs
2012-09-25 Mrinmoy GhoshCache: add a response latency to the caches
2012-09-24 Andreas HanssonRegression: Set the clock for twosys-tsunami CPUs
2012-09-21 Andreas HanssonSimpleDRAM: A basic SimpleDRAM regression
2012-09-21 Andreas HanssonTrafficGen: Add a basic traffic generator regression
2012-08-22 Andreas HanssonBridge: Remove NACKs in the bridge and unify with packe...
2012-07-21 Andreas HanssonRegression: Fix topologies path in failing pc-simple...
2012-07-12 Andreas HanssonMem: Make SimpleMemory single ported
2012-07-11 Brad Beckmannregress: ruby stat additions and config changes
2012-06-11 Marc OrrRegression: Fix some bugs in simple-timing-mp-ruby.py.
2012-05-31 Andreas HanssonBus: Split the bus into a non-coherent and coherent bus
2012-04-26 Nilay VaishRegression: Add a test for x86 timing full system ruby...
2012-04-06 Brad Beckmannregress: ruby random tester and hammer stats updates
2012-04-06 Brad BeckmannMOESI_hammer: fixed bug with single cpu + flushes,...
2012-04-06 Andreas HanssonMEM: Enable multiple distributed generalized memories
2012-03-28 Nilay VaishConfig: Change the way options are added
2012-03-09 Geoffrey BlakeCheckerCPU: Make some basic regression tests for CheckerCPU
2012-03-09 Ali Saidicache: Allow main memory to be at disjoint address...
2012-03-08 Gabe BlackFix the SPARC fs regression by adding a call to createI...
2012-03-02 Andreas HanssonCPU: Check that the interrupt controller is created...
2012-02-14 Andreas HanssonScript: Fix the scripts that use the num_cpus cache...
2012-02-13 Andreas HanssonMEM: Introduce the master/slave port roles in the Pytho...
2012-02-12 Dam Sunwoomem: fix cache stats to use request ids correctly
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Gabe BlackMerge with main repository.
2012-01-30 Andreas HanssonRuby: Connect system port in Ruby network test
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-28 Gabe BlackSE/FS: Make both SE and FS tests available all the...
2012-01-28 Gabe BlackSE/FS: Make SE vs. FS mode a runtime parameter.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-17 Andreas HanssonMEM: Make the bus bridge unidirectional and fixed addre...
2012-01-17 Andreas HanssonMEM: Add port proxies instead of non-structural ports
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2011-12-01 Chander SudanthiO3: Remove hardcoded tgts_per_mshr in O3CPU.py.
2011-10-09 Gabe BlackConfigs: Use connectAllPorts to connect ports for simpl...
2011-08-19 Ali SaidiARM: Add some MP regressions and clean up the disk...
2011-07-06 Gabe BlackX86: Add a config for an FS regression on O3.
2011-07-01 Brad Beckmann ext... Ruby: Add support for functional accesses
2011-06-20 Korey Sewellinorder: make InOrder CPU FS compilable/visible
2011-05-23 Steve Reinhardtconfig: tweak ruby configs to clean up hierarchy
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