Add ability to override verilog mode for verific -f command
[yosys.git] / tests / svtypes / typedef_struct_port.sv
2021-03-01 Claire XenMerge pull request #2523 from tomverbeure/define_synthesis
2021-03-01 Claire XenMerge pull request #2524 from bkbncn/patch-1
2021-02-12 gatecatMerge pull request #2585 from YosysHQ/dave/nexus-dotproduct
2021-02-03 whitequarkMerge pull request #2436 from dalance/fix_generate
2021-01-28 Claire XenMerge pull request #2535 from Ravenslofty/scc-specify
2021-01-26 whitequarkMerge pull request #2544 from modwizcode/fix-clock
2021-01-20 Miodrag MilanovićMerge pull request #2536 from TobiasFaller/master
2021-01-18 whitequarkMerge pull request #2547 from zachjs/plugin-so-dsym
2021-01-18 whitequarkMerge pull request #2312 from antmicro/typedef-inout
2021-01-18 Kamil RakoczyAdd typedef input/output test