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Merge remote-tracking branch 'origin/master' into xc7mux
[yosys.git] / tests / techmap /
2019-02-20 Eddie HungMove tests/techmap/abc9 to simple_abc9 tree | commitdiff
2019-02-19 Eddie HungAdd a quick abc9 test tree | commitdiff
2016-07-08 Clifford WolfMerge branch 'yosys-0.5-vtr' of https://github.com... tree | commitdiff
2015-12-07 Clifford WolfMerge pull request #108 from cseed/master tree | commitdiff
2015-09-25 Clifford WolfAdded read-enable to memory model tree | commitdiff
2015-04-03 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol... tree | commitdiff
2015-02-14 Clifford WolfAdded $meminit support to "memory" command tree | commitdiff
2014-09-22 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol... tree | commitdiff
2014-07-16 Clifford WolfMerged new $mem/$memwr WR_EN interface tree | commitdiff
2014-07-16 Clifford WolfChanged tests/techmap/mem_simple_4x1_map for new $mem... tree | commitdiff
2014-03-11 Siesh1ooRebase to cliffordwolf repo HEAD finished. tree | commitdiff
2014-03-11 Clifford WolfFixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh tree | commitdiff
2014-03-11 Clifford WolfUse "verilog -noattr" in tests/techmap/mem_simple_4x1... tree | commitdiff
2014-02-21 Clifford WolfUse private namespace in mem_simple_4x1_map tree | commitdiff
2014-02-21 Clifford WolfAdded tests/techmap/mem_simple_4x1 tree | commitdiff